Renesas M16C Series User Manual

Overview of Interrupts
M30240 Group
Rev.1.00 Sep 24, 2003 Page 332 of 360
• A-D conversion interrupt
This is an interrupt that the A-D converter generates.
• UART0, UART1 and UART2 transmission interrupt
These are interrupts that the serial I/O transmission generates.
• UART0, UART1 and UART2 reception interrupt
These are interrupts that the serial I/O reception generates.
• Timer A0 interrupt through Timer A4 interrupt
These are interrupts that Timer A generates
• Timer B0 interrupt and Timer B1 interrupt
These are interrupts that Timer B generates.
• INT0 interrupt and INT1 interrupt
An INT interrupt occurs if either a rising edge or a falling edge is input to the INT pin. The edge polarity is se-
lected by using the polarity select bit.
4.1.2 Interrupt Vector Tables
If an interrupt request is accepted, a program branches to the interrupt routine set in the interrupt vector
table. Set the first address of the interrupt routine in each vector table. Two types of interrupt vector
tables are available — fixed vector table in which addresses are fixed and variable vector table in which
addresses can be varied by the setting.
4.1.2.1 Fixed vector tables
The fixed vector table is a table in which addresses are fixed. The vector tables are located in an area
extending from FFFDC
16
to FFFFF
16
. One vector table comprises four bytes. Set the first address of
the interrupt routine in each vector table. Table 4.1 shows the interrupts assigned to the fixed vector
tables and addresses of the vector tables.
Note: Interrupts used for debugging purposes only.
Table 4.1: Interrupts assigned to the fixed vector tables and addresses of vector tables
Interrupt source
Vector table addresses
Address (L) to Address (H)
Remarks
Undefined instruction
FFFDC
16
to FFFDF
16
Interrupt on UND instruction
Overflow
FFFE0
16
to FFFE3
16
Interrupt on INTO instruction
BRK instruction
FFFE4
16
to FFFE7
16
If the vector contains FF16, program execution starts
from the address shown by the vector in the variable
vector table.
Address match
FFFE8
16
to FFFEB
16
There is an address-match interrupt enable bit
Single step (Note)
FFFEC
16
to FFFEF
16
Do not use
Watchdog timer
FFFF0
16
to FFFF3
16
DBC (Note)
FFFF4
16
to FFFF7
16
Do not use
NMI
FFFF8
16
to FFFFB
16
External interrupt by input to NMI pin
Reset
FFFFC
16
to FFFFF
16

Renesas M16C Series Specifications

General

Brand	Renesas
Model	M16C Series
Category	Computer Hardware
Language	English