RL78/F13, F14 CHAPTER 6 TIMER ARRAY UNIT
R01UH0368EJ0210 Rev.2.10 519
Dec 10, 2015
Figure 6-67. Block Diagram of Operation as One-Shot Pulse Output Function
Remarks 1. m: Unit number (m = 0, 1), n: Master channel number (n = 0, 2, 4, 6)
p: Slave channel number (n < p ≤ 7)
2. Unit 1 is not provided in the Group A products.
Channels 7 to 4 of unit 1 are not provided in the Group B, C, and D products.
Edge
detection
Interrupt signal
(INTTMmn)
Interrupt
controller
Clock selection
Trigger selection
TSmn
Interrupt signal
(INTTMmp)
Interrupt
controller
Clock selection
Trigger selection
TOmp pin
Output
controller
Master channel
(one-count mode)
Slave channel
(one-count mode)
Timer counter
register mn (TCRmn)
Timer data
register mn (TDRmn)
Timer counter
register mp (TCRmp)
Timer data
register mp (TDRmp)
CKm2
CKm3
Operation clock
CKm0
CKm1
CKm2
CKm3
Operation clock
CKm0
CKm1
TImn pin
Noise
filter
NFEN1 and
NFEN2
registers
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