RM0440 Rev 4 31/2126
RM0440 Contents
48
30.4.14 Complementary outputs and dead-time insertion . . . . . . . . . . . . . . . 1373
30.4.15 Using the break function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1376
30.4.16 Bidirectional break input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1379
30.4.17 Clearing the tim_ocxref signal on an external event . . . . . . . . . . . . . 1381
30.4.18 One-pulse mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1382
30.4.19 Retriggerable one pulse mode (TIM15 only) . . . . . . . . . . . . . . . . . . . 1383
30.4.20 UIF bit remapping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1384
30.4.21 Timer input XOR function (TIM15 only) . . . . . . . . . . . . . . . . . . . . . . . 1384
30.4.22 External trigger synchronization (TIM15 only) . . . . . . . . . . . . . . . . . . 1385
30.4.23 Slave mode – combined reset + trigger mode (TIM15 only) . . . . . . . 1387
30.4.24 Slave mode – combined reset + gated mode (TIM15 only) . . . . . . . . 1387
30.4.25 Timer synchronization (TIM15) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1388
30.4.26 Using timer output as trigger for other timers (TIM16/TIM17) . . . . . . 1388
30.4.27 DMA burst mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1388
30.4.28 TIM15/TIM16/TIM17 DMA requests . . . . . . . . . . . . . . . . . . . . . . . . . . 1389
30.4.29 Debug mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1389
30.5 TIM15/TIM16/TIM17 low-power modes . . . . . . . . . . . . . . . . . . . . . . . . 1390
30.6 TIM15/TIM16/TIM17 interrupts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1390
30.7 TIM15 registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1391
30.7.1 TIM15 control register 1 (TIM15_CR1) . . . . . . . . . . . . . . . . . . . . . . . 1391
30.7.2 TIM15 control register 2 (TIM15_CR2) . . . . . . . . . . . . . . . . . . . . . . . 1392
30.7.3 TIM15 slave mode control register (TIM15_SMCR) . . . . . . . . . . . . . 1394
30.7.4 TIM15 DMA/interrupt enable register (TIM15_DIER) . . . . . . . . . . . . 1395
30.7.5 TIM15 status register (TIM15_SR) . . . . . . . . . . . . . . . . . . . . . . . . . . 1396
30.7.6 TIM15 event generation register (TIM15_EGR) . . . . . . . . . . . . . . . . 1398
30.7.7 TIM15 capture/compare mode register 1 [alternate]
(TIM15_CCMR1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1399
30.7.8 TIM15 capture/compare mode register 1 [alternate]
(TIM15_CCMR1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1401
30.7.9 TIM15 capture/compare enable register (TIM15_CCER) . . . . . . . . . 1403
30.7.10 TIM15 counter (TIM15_CNT) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1406
30.7.11 TIM15 prescaler (TIM15_PSC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1406
30.7.12 TIM15 auto-reload register (TIM15_ARR) . . . . . . . . . . . . . . . . . . . . . 1407
30.7.13 TIM15 repetition counter register (TIM15_RCR) . . . . . . . . . . . . . . . . 1407
30.7.14 TIM15 capture/compare register 1 (TIM15_CCR1) . . . . . . . . . . . . . . 1408
30.7.15 TIM15 capture/compare register 2 (TIM15_CCR2) . . . . . . . . . . . . . . 1409
30.7.16 TIM15 break and dead-time register (TIM15_BDTR) . . . . . . . . . . . . 1409
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