FMCP Connector J28
[Figure 2, callout 25]
The HSPC connector J28 implements a subset of the full FMCP connecvity:
• 68 single-ended or 34 dierenal user-dened pairs (34 LA pairs: LA[00:33])
• 8 transceiver dierenal pairs
• 2 transceiver dierenal clocks
• 2 dierenal clocks
• 239 ground and 16 power connecons
See the FPGA Mezzanine Card (FMC) VITA 57.4 specicaon on the VITA FMC Markeng
Alliance website for addional informaon on the FMCP HSPC connector.
The detailed RFSoC connecons for the feature described in this secon are documented in the
ZCU216 board XDC le, referenced in Appendix B: Xilinx Design Constraints.
Cooling Fan Connector
[Figure 2, near callout 33]
The ZCU216 cooling fan circuit is shown in the gure below.
The ZCU216 uses the Inneon MAX6643 (U50) fan controller, which autonomously controls the
fan speed by controlling the pulse width modulaon (PWM) signal to the fan based on the die
temperature sensed via the FPGA's DXP and DXN pins. The fan rotates slowly (acouscally quiet)
when the RFSoC is cool and rotates faster as the FPGA heats up (acouscally noisy). The fan
speed (PWM) versus the RFSoC die temperature algorithm along with the over temperature set
point and fan failure alarm mechanisms are dened by the strapping resistors on the MAX6643
device. The over temperature and fan failures alarms can be monitored by any available
processor in the RFSoC by polling the I2C expander U15 on the I2C0 bus. See the MAX6643
data sheet on the Maxim Integrated Circuits website for more informaon on the device circuit
implementaon on this board.
Note: At inial power On, it is normal for the fan controller to energize at full speed for a few seconds.
Chapter 3: Board Component Descriptions
UG1390 (v1.1) July 10, 2020 www.xilinx.com
ZCU216 Board User Guide 60