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ABB REL650 - Page 288

ABB REL650
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Time
Integrator
Voltage
Time
START
TRIP
START
U1>
START
TRIP
t
tIReset1
Time
t
Frozen Timer
Linearly
decreased
Instantaneous
Measured
Voltage
tIReset1
IEC05000020-3-en.vsd
HystAbs1
IEC05000020 V3 EN-US
Figure 138: Voltage profile causing a reset of the START signal for step 1, and inverse time delay at
different reset types
Definite time delay
When definite time delay is selected, the function will operate as shown in figure
139. Detailed information about individual stage reset/operation behavior is shown
in figure 140 and figure 141 respectively. Note that by setting tResetn = 0.0s
(where n means either 1 or 2 respectively), instantaneous reset of the definite time
delayed stage is ensured.
Section 8 1MRK 506 382-UEN A
Voltage protection
282 Line distance protection REL650 2.2 IEC
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