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ABB REL650 - Output

ABB REL650
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6.5.6.4 Output
GUID-FCDCF1A9-A34D-4FD7-B488-3F31A93BE231 v1
All loop releasing signals are gathered in the binary coded integer output ZREL.
The value of ZREL can be calculated according to Equation
15.
32*1316*328*214*32*21*1 LLLLLLNLNLNLZREL
IECEQUATION16018 V1 EN-US (Equation 15)
For example, if only L1N is active, then the value is 1. If both start L1N and L3N
are active, then the value is 1+4=5.
The phase-to-phase loops are always released, that is, the value of
ZREL will always be at least 8+16+32=56. For example:
If only L1N is active, then the value is 1+56=57
If start L1N and L3N are active, then the value is 1+4+56=61
The BLOCK input will only block the enabling signals for phase-
to-earth loops, phase-to-phase loops are still released. The
PPL2PHIZ is designed not to have any influence on the phase-to-
phase loops of the distance protection.
BLOCK
TRUE
Bool to
Integer
ZREL
L3L1
L2L3
L1L2
L3N
L2N
L1N
zrelL1
zrelL2
zrelL3
TRUE
TRUE
startU
AND
AND
AND
AND
IEC16000025-1-en.vsdx
IEC16000025 V1 EN-US
Figure 78: Output
Section 6 1MRK 506 382-UEN A
Impedance protection
156 Line distance protection REL650 2.2 IEC
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