ABB REL650 - Page 483

START (in)
STL1 (in)
STL3 (in)
&
FW (in)
&
REV (in)
&
FWL1 (in)
&
REVL1 (in)
&
FWL2 (in)
&
REVL2 (in)
&
FWL3 (in)
&
REVL3 (in)
START (out)
FW (out)
REV (out)
STL1 (out)
FWL1 (out)
REVL1 (out)
STL2 (out)
FWL2 (out)
REVL2 (out)
STL3 (out)
FWL3 (out)
REVL3 (out)
STDIROUT
STL2 (in)
START Criteria
START (in)
STL1 (in)
FW (in)
REV (in)
FWL1 (in)
REVL1 (in)
FWL2 (in)
REVL2 (in)
FWL3 (in)
REVL3 (in)
STL2 (in)
in
b0
IntToBits
b1
b2
b3
b4
b5
b6
b7
b8
b9
b10
b11
STL3 (in)
b12
b13
b14
STN (in)
FWN (in)
REVN (in)
STDIRX
≥1
STN (in)
STN (out)
&
FWN (in)
&
REVN (in)
FWN (out)
REVN (out)
≥1
≥1
START (out)
STL1 (out)
FW (out)
REV (out)
FWL1 (out)
REVL1 (out)
FWL2 (out)
REVL2 (out)
FWL3 (out)
REVL3 (out)
STL2 (out)
out
b0
BitsToint
b1
b2
b3
b4
b5
b6
b7
b8
b9
b10
b11
STL3 (out)
b12
b13
b14
STN (out)
FWN (out)
REVN (out)
FALSE b15b15 N/A
IEC16000162-2-en.vsdx
IEC16000162 V2 EN-US
Figure 247: The START Criteria function
START (in)
STL1 (in)
STL3 (in)
&
FW (in)
&
REV (in)
FWL1 (in)
REVL1 (in)
START (out)
FW (out)
REV (out)
STL1 (out)
FWL1 (out)
REVL1 (out)
STL2 (out)
FWL2 (out)
REVL2 (out)
STL3 (out)
FWL3 (out)
REVL3 (out)
=1
&
&
FWL2 (in)
REVL2 (in)
=1
&
&
FWL3 (in)
REVL3 (in)
=1
STL2 (in)
DIRECTION Criteria
START (in)
STL1 (in)
FW (in)
REV (in)
FWL1 (in)
REVL1 (in)
FWL2 (in)
REVL2 (in)
FWL3 (in)
REVL3 (in)
STL2 (in)
in
b0
IntToBits
b1
b2
b3
b4
b5
b6
b7
b8
b9
b10
b11
STL3 (in)
b12
b13
b14
STN (in)
FWN (in)
REVN (in)
STDIRIN STDIR
START (out)
STL1 (out)
FW (out)
REV (out)
FWL1 (out)
REVL1 (out)
FWL2 (out)
REVL2 (out)
FWL3 (out)
REVL3 (out)
STL2 (out)
out
b0
BitsToint
b1
b2
b3
b4
b5
b6
b7
b8
b9
b10
b11
STL3 (out)
b12
b13
b14
STN (out)
FWN (out)
REVN (out)
FWN (out)
REVN (out)
&
&
FWN (in)
REVN (in)
=1
≥1
≥1
STN (in) ST N (out)
b15FALSEb15 N/A
IEC16000163-2-en.vsdx
IEC16000163 V2 EN-US
Figure 248: The DIRECTION Criteria function
1MRK 506 382-UEN A Section 13
Logic
Line distance protection REL650 2.2 IEC 477
Technical manual