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Avnet Qseven MSC Q7-BT User Manual

Avnet Qseven MSC Q7-BT
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MSC Q7-BT MSC_Q7-BT_User_Manual.pdf 36 / 113
Table 4-7 LVDS Signal Description
Signal
Pin Type
Signal Level
Available
Power
Tolerance
PU/PD
Description
LVDS_A[0:3]+
LVDS_A[0:3]-
O
LVDS
Full On
LVDS Channel A differential pairs
LVDS_A_CK+
LVDS_A_CK-
O
LVDS
Full On
LVDS Channel A differential clock
LVDS_B[0:3]+
LVDS_B[0:3]-
O
LVDS
Full On
LVDS Channel B differential pairs
LVDS_B_CK+
LVDS_B_CK-
O
LVDS
Full On
LVDS Channel B differential clock
LVDS_PPEN
O OD
3.3V CMOS
Full On
3.3V
PU 1k 3.3V
LVDS panel power enable
LVDS_BLEN
O PP
3.3V CMOS
Full On
3.3V
LVDS backlight enable
LVDS_BKLT_CTRL
O PP
3.3V CMOS
Full On
3.3V
LVDS backlight brightness control
LVDS_DID_CLK
O OD
3.3V CMOS
Full On
3.3V
PU 10k 3.3V
I²C clock output for LVDS display use
LVDS_DID_DAT
I/O OD
3.3V CMOS
Full On
3.3V
PU 10k 3.3V
I²C data line for LVDS display use

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Avnet Qseven MSC Q7-BT Specifications

General IconGeneral
BrandAvnet
ModelQseven MSC Q7-BT
CategoryControl Unit
LanguageEnglish

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