Table 8-9: ADKCON and ADKCONR Register
Bit
Number
Name
Function
15
CLR/SET
Same use as
in
the DMA enable register.
Bit
15
must be a 1 if the
register bits are to
be
set.
Bit
15
is a 0 if the bits
are to be cleared.
14
PRECOMP1
MSB of Precomp specifier
13
PRECOMPO
LSB of Precomp specifier
Value of 00 selects none.
Value of
01
selects 140 ns.
Value of
10
selects 280 ns.
Value of
11
selects 560 ns.
12 MFMPREC
Value of 0 selects GCR Precomp.
Value of 1 selects MFM Precomp.
11
UARTBRK
Value of 1 forces the
output
of the
Paula
special chip's serial port to 0 (an RS-232-C break).
10
WORD SYNC Value of 1 enables synchronizing and starting
of DMA on disk read of a word.
The
word on which
to synchronize must be written into the DSKSYNC
address (DFF07E).
9
MSBSYNC Value of 1 enables sync on MSBit (GCR).
8
FAST Value of 1 selects two microseconds
per bit cell (usually MFM), 0 selects four
microseconds per bit (usually GCR).
7-4 ATPER3-0
Audio attach-period controls (not disk-related).
3-0 ATVOL3-0
Audio attach-volume controls (not disk-related).
One form of GCR format is the format used by the Apple[tm] computer.
Data
bytes on
Apple-formatted disks always have the most significant bit set to a
1.
When reading a
GCR formatted disk, the software must use a translate table called a nibble-izer to
234 Interface Hardware
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