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Curtiss-Wright CHAMP-AV8 User Manual
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CHAMP-AV8 (VPX6-462) H
ARDWARE
U
SER
’
S
M
ANUAL
C
URTISS
-W
RIGHT
A-64
P
ROPRIETARY
826448 V
ERSION
5 M
ARCH
2015
Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com
154
156
Table of Contents
Default Chapter
6
Table of Contents
6
Preface
14
Purpose
14
Audience
14
Scope
14
Documentation Roadmap
15
Related Software Documents
15
Reference Documentation
16
Conventions Used in this Manual
17
Technical Support Information
21
1 Product Overview
22
In this Chapter
22
General Description
23
Feature Summary
24
Figure 1.1: Air-Cooled CHAMP-AV8 Isometric View
24
Technical Description
26
Figure 1.2: CHAMP-AV8 Functional Block Diagram
26
Quad-Core Intel Core I7 Processors
27
Figure 1.3: CHAMP-AV8 PCI Express Distribution
28
PCI Express Architecture
28
Figure 1.4: Pcie Switch Partitions
30
SRIO Fabric
31
Figure 1.5: CHAMP-AV8 SRIO Port Connections
32
Core Functions FPGA
33
Figure 1.6: Core Functions FPGA Block Diagram
33
Double Data Rate (DDR3) SDRAM with ECC
34
Figure 1.7: Boot Flash SPI Bus Architecture
35
NAND Flash Memory
35
Protected Boot Flash Memory
35
Non-Volatile Memory Security
36
Non-Volatile RAM (NVRAM)
36
XMC Site
36
Avionics Style Watchdog Timer
37
Utility Features, Semaphores, Timers
37
Multi-Board Synchronous Clock
38
Serial Ports
38
Figure 1.8: CHAMP-AV8 Serial Port Implementation
39
1000Base-T Ethernet
40
Figure 1.9: CHAMP-AV8 Serial Port Detail
40
1000Base-BX Ethernet
41
USB and SATA Interfaces
41
Differential Discrete Digital I/O
42
LVTTL Discrete Digital I/O
42
Figure 1.10: Location of Voltage, Current, and Temperature Sensors (Primary Side)
43
Voltage, Current, and Temperature Sensors
43
Figure 1.11: Location of Voltage, Current, and Temperature Sensors (Secondary Side)
44
Indicator Leds
44
Cables and Rear Transition Modules
45
Interrupt Controller
45
RTC/CMOS RAM Backup Power
45
Figure 1.12: CHAMP-AV8 Interrupt Controller Block Diagram
46
Figure 1.13: Interrupt Routing Block (Part A)
49
Figure 1.14: Interrupt Routing Block (Part B)
50
Specifications
52
VPX Compliance
52
Power Requirements
53
Dimensions
54
Weight
54
Ruggedization Levels
55
Physical Characteristics
56
Figure 1.15: CHAMP-AV8 Board Layout-Primary Side)
56
Figure 1.16: CHAMP-AV8 Board Layout-Secondary Side
57
VPX6-462-A Front Panel
58
Figure 1.17: Status LEDS on Conduction-Cooled Variants
59
Location of Status LEDS on Conduction-Cooled Variant
59
Mating Connectors
60
Overview of Available Software
61
Built in Test (BIT) Firmware
61
Operating System Software
61
Continuum IPC™ Library
61
Continuum Vector™ Library
62
2 Pre-Installation Tasks
64
In this Chapter
64
Unpacking the Card
65
Checking Hardware Requirements
65
Chassis Requirements
65
Backplane Requirements
65
Detailed Power Requirements
66
BIOS Configuration Parameters
67
XMC Module Installation Requirements
67
XMC Site
67
Cable Requirements
69
Figure 2.1: CBL-462-FPL-000 (CHAMP-AV8 Standard Front Panel Cable Assembly)
69
Configuring Jumpers
70
Figure 2.2: Configuration Jumper Locations
71
3 Hardware Installation
72
In this Chapter
72
Introduction
73
Electro-Static Discharge (ESD) Precautions
73
Installation Prerequisites
74
Installation Checklist
74
Unpack and Configure the Card
74
Install the XMC Module on the Basecard
74
Choose a VPX Slot Location
75
Quick Installation and Power up Procedure
75
Detailed Installation Procedure
75
Insert the Basecard in the Chassis
75
Connect a Terminal
76
Connect Ethernet Ports
77
Figure 3.1: Location of CHAMP-AV8 Ethernet Activity Leds
78
CBL-462-FPL-000 Front Panel Cable Connections
79
Booting: Entering the BIOS Setup Utility
82
Figure 3.2: System Boot Screen
82
Initiate the Power-Up Sequence
83
Display the Initial Screen Message
83
Figure 3.3: GRUB Loading Message
84
Troubleshooting
85
Verify Insertion in Chassis
85
LED Diagnostics
85
LED Start-Up Sequence (Power On)
90
LED Start-Up Sequence (Reset)
91
Sign-On Message Garbled
91
The Next Step
91
Connector Pin Assignments
92
In this Appendix
92
Connector Overview
94
Backplane VPX Connectors
94
Figure A.1: VPX System Connectors Overview
94
Figure A.2: VPX RT2 Type Connector
95
Figure A.3: VPX RT2 Wafer Routings
96
Figure A.4: CHAMP-AV8 Backplane P0-P6 Connector Orientation
98
CHAMP-AV8 I/O Mapping
99
Figure A.5: I/O Mapping to the CHAMP-AV8 VITA 46 Connectors
99
Using the CHAMP-AV8 Pinout Configurator
101
Selecting the XMC Module
102
Figure A.6: CHAMP-AV8 Pinout Configurator Main Window
102
Generating Pinouts
103
Figure A.7: Sample P5 Pinout Table
103
Saving the Pinout Table
104
Figure A.8: CHAMP-AV8 P0 Utility Connector
105
Figure A.9: CHAMP-AV8 P1 SRIO Fabric Connector
108
CHAMP-AV8 P2 (Pcie Expansion) Connector Pin Assignments
111
Figure A.10: CHAMP-AV8 VITA 46 P2 Connector
111
Figure A.11: P3 XMC Site's PMC User I/O Connector
114
Figure A.12: P4 Basecard I/O Connector
117
CHAMP-AV8 P5 (XMC User I/O) Connector Pin Assignments
121
Figure A.13: P5 XMC User I/O Connector
121
CHAMP-AV8 P6 (XMC/DIO/SATA/USB) Connector Pin Assignments
124
Figure A.14: P6 XMC/Dio/Pcie Connector
124
J1 Front Panel Connector
128
Figure A.15: J1 Contact Numbering Arrangement (Looking into the Front Panel
129
XMC Site's PMC J14 Connector
130
XMC Site's PMC J14 User I/O Connector
130
Figure A.16: Location of CHAMP-AV8 J14 Connector
130
XMC J15 and J16 Connectors
133
XMC J15 Connector
133
Figure A.17: Location of CHAMP-AV8 XMC J15 and J16 Connectors
133
XMC J16 User I/O Connector
136
Rear Transition Module (RTM
143
Figure A.18: CHAMP-AV8 Rear Transition Module Views
143
Figure A.19: RTM Printed Wiring Board Component Side View
144
Rear Transition Module Panel-Mounted Connectors
145
Figure A.20: Serial Port Loopback Control Via RTM P3
146
Table A.38: RTM EIA-232 COM Ports A-D (J2-J3) Connector Details
146
Figure A.21: Proper Jumper Orientation for RTM P3 Jumpers
147
Rear Transition Module (RTM) Configuration Switches
148
Rear Transition Module (RTM) PWB Header Connectors
149
Table A.40: RTM Header Functions
150
Table A.41: RTM PMC I/O (JB2) Pin Assignments
150
Table A.42: RTM Discrete I/O (P4, P5) Pin Assignments
152
Table A.43: RTM Geographical Address (P12) Pin Assignments
152
Table A.44: XMC Single Ended I/O (JB6) Pin Assignments
153
Table A.45: RTM XMC Differential User I/O (J7) Pin Assignments
154
Statement of Memory Volatility
156
In this Appendix
156
CHAMP-AV8 Statement of Volatility
156
Table B.1: Memory Devices Available on the CHAMP-AV8
157
Memory Write Protection
160
In this Appendix
160
NVRAM Write Protection
161
BIOS SPI Flash Write Protection
162
On-Board SATA (NAND) Flash Write Protection
163
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Curtiss-Wright CHAMP-AV8 Specifications
General
Brand
Curtiss-Wright
Model
CHAMP-AV8
Category
Signal Processors
Language
English
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