826448 VERSION 5 MARCH 2015 PROPRIETARY I-1
I
B
backplane requirements 2-2
backplane VPX connectors A-3
block diagram 1-5
bottom view of CHAMP-AV8 PWB 1-36
Built In Test (BIT) firmware 1-40
C
cable connections 3-8
cable requirements 2-6
CHAMP-AV8
board layout 1-35
dimensions 1-33
functional block diagram 1-5
power requirements 1-32, 2-3
weight 1-33
chassis requirements 2-2, 2-4
checking hardware requirements 2-2
choosing a VPX slot location 3-4
configuring an emulator for use with CHAMP-AV8 3-14
configuring jumpers 2-7
connecting a terminal 3-5
connecting Ethernet port 0 3-6
connectors
backplane VPX A-3
COP Connector A-56
D
detailed installation procedure 3-4
dimensions 1-33, 1-35
Discrete I/O (DIO) header pin assignments (JB3) A-61
Discrete I/O (JB3) pin assignments (RTM) A-61
E
EIA-232 COM Ports A-D (J4-J7) - RTM A-55
EIA-232 Serial Port Connectors (RTM) A-55
Electro-Static Discharge (ESD) precautions 3-2
ENET 1, ENET 2 Connectors (RTM) A-54
Ethernet LEDs 3-6
F
feature summary 1-3
front panel cable 3-8
G
Geographical Addressing header pin assignments (JB4)
A-61
H
hardware requirements 2-2
header connectors, Rear Transition Module (RTM) A-58
I
In This Chapter 1-1
initial screen message 3-13
initial screen message, displaying 3-13
inserting the basecard in the chassis 3-4
install PMC modules on the basecard 3-3
installation checklist 3-3
installation prerequisites 3-3
installing PMC modules 3-3
J
J1 front panel connector A-36
J1 front panel connector layout A-38
J15 connector A-42
J15 connector pin assignments A-43
L
layout, Rear Transition Module (RTM) A-53
loopback control (serial ports) via RTM JB1 A-55
INDEX
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