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CHAMP-AV8 (VPX6-462) HARDWARE USERS MANUAL CURTISS-WRIGHT
1-4 PROPRIETARY 826448 VERSION 5 MARCH 2015
8GB NAND flash on SATA per processor
Protected backup boot flash
256 KB NVRAM
Secure write-protection on all non-volatile memory
De-classify function to erase non-volatile memory
Trusted Platform Management (TPM)
PCI Express
®
(PCIe) local fabric with 2GB/s bi-directional inter-processor bandwidth
Gen2 Serial RapidIO® (sRIO) Data Plane interface, 8GB/s bi-directional bandwidth (5
Gbps data rate, default setting)
On-board Gen2 sRIO switch
Gen2 PCIe Expansion Plane interface on P2, up to 8 GB/s bidirectional bandwidth
Eight-channel PCIe DMA controller to off-load CPUs
Two 1000Base-T Ethernet interfaces
Two 1000Base-BX Ethernet interfaces
One XMC mezzanine site
Serial ports: each node has one EIA-422 port always present, plus either two EIA-232
ports or one EIA-422 port (software configurable)
Three USB 2.0 interfaces
Two eSATA interfaces
16 LVTTL I/O signals with interrupt
Differential discrete I/O
12 general purpose timers
Avionics watchdog timer
16 semaphore registers
Multi-board synchronous clock feature
Temperature sensors, Voltage and current sensors for measuring power consumption
User-variable processor frequency to control power consumption
Continuum Software Architecture firmware
VxWorks® 64-bit BSP supporting SMP
Fedora 64-bit BSP supporting SMP
Continuum Vector™ AVX/SSE optimized DSP function library
Continuum Insights multi-processor development tools
Continuum IPC inter-processor communications library
Range of air- and conduction-cooled ruggedization levels available
•VITA 48 1 pitch
VITA 65 compliant with the MOD6-PAY-4F1Q2U2T-12.2.1-11/12 module profile.
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