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11 TOTAL-ACEXTREME® SIGNALS
11.1 Signal Descriptions and Pinout by Functional Groups
Table 15. Protocol Configuration
Signal Name BALL Pullup/
Pulldown
Description
DISABLE_BC (I) C14 50k
Pulldown
When ‘1’, indicates that the Total-AceXtreme cannot operate in BC mode (i.e.
BC operation is disabled).
When ‘0’, indicates that the Total-AceXtreme can operate in BC mode
provided that it isn’t an RT-ONLY device.
DISABLE_MULTI_RT (I)
D14 50k
Pulldown
When ‘1’, indicates that the Total-AceXtreme cannot operate in Multi-RT
mode (i.e. Limited to one RT-Address).
When ‘0’, indicates that the Total-AceXtreme can operate in Multi-RT mode.
PCI_nCPU (I) C11 50k
Pulldown
When ‘1’, indicates that the PCI interface is active. When ‘0’, indicates that
the CPU Interface is active.
nRTBOOT (I) D13 50k Pullup If nRTBOOT is connected to logic "0", the Total-AceXtreme will initialize in
RT mode with the Busy status word bit set following power turn-on. If
nRTBOOT is hardwired to logic "1", the Total-AceXtreme will initialize in
either Idle mode (for an RT-only part), or BC mode (for a BC/RT/MT part).
nPOR C10 None Power-on Reset. Asserting nPOR low resets all Total-AceXtreme logic, along
with the PLL that generates the internal 160 MHz clock. Following the low-to-
high transition of nPOR, if enabled (by DISABLE_BIST = ‘0’), the Total-
AceXtreme will initiate its internal built-in self-test (BIST). The host processor
should not attempt to access the Total-AceXtreme registers or memory until
at least 1 ms after the low-to-high transition of nPOR. Following nPOR being
asserted high, the host processor must wait a minimum of 1 ms if
DISABLE_BIST = ‘0’, or 500 μs if DISABLE_BIST =’1' before accessing
memory or registers.
PLL_LOCKED A13 None PLL Locked output. Indicates that the output from the PLL providing the
internal 160 MHz clock is operational. Immediately following power turn-on,
PLL_LOCKED will assert low, and will remain low while nPOR is asserted
low. Assuming correct operation of the PLL, PLL_LOCKED will transition
from ‘0’ to ‘1’ following a maximum of 100 µs after nPOR goes high.
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