Eaton EDR 3000 - Page 316

EDR-3000 IM02602003E
Name Description
Logic.LE78.Gate Out Signal: Output of the logic gate
Logic.LE78.Timer Out Signal: Timer Output
Logic.LE78.Out Signal: Latched Output (Q)
Logic.LE78.Out inverted Signal: Negated Latched Output (Q NOT)
Logic.LE79.Gate Out Signal: Output of the logic gate
Logic.LE79.Timer Out Signal: Timer Output
Logic.LE79.Out Signal: Latched Output (Q)
Logic.LE79.Out inverted Signal: Negated Latched Output (Q NOT)
Logic.LE80.Gate Out Signal: Output of the logic gate
Logic.LE80.Timer Out Signal: Timer Output
Logic.LE80.Out Signal: Latched Output (Q)
Logic.LE80.Out inverted Signal: Negated Latched Output (Q NOT)
Sys.Maint Mode Active Signal: Arc Flash Reduction Maintenance Active
Sys.Maint Mode Inactive Signal: Arc Flash Reduction Maintenance Inactive
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