EDR-3000 IM02602003E
51P - INV Overcurrent-Protection
Elements
51P[1] ,51P[2] ,51P[3]
If using inrush blockings, the tripping delay of the current protection functions must be at
least 30 ms or more in order to prevent faulty trippings (applies only to devices which are
equipped with Inrush protection).
All overcurrent protective elements are identically structured.
For each element, the following characteristics are available:
•NINV (IEC/XInv);
•VINV (IEC/XInv);
•LINV (IEC/XInv);
•EINV (IEC/XInv);
•MINV (ANSI/XInv);
•VINV (ANSI/XInv);
•EINV (ANSI/XInv);
•Thermal Flat;
•Therm Flat IT;
•Therm Flat I2T; and
•Therm Flat I4T.
For tripping curves please refer to the “Appendix/Time Current Curves (PHASE)” section.
www.eaton.com 413
To Next Page
Loading...
