Edge-Core AS7326-56X - Page 139

EDGECORE NETWORKS CORPORATION 2018
139
3
Port33_Active_R
(P30_Lane1_LED_R)
R/W
0
1: Port33_R Active ON
0: Port33_R Active OFF (Default)
2
Port33_B
(P30_Lane1_LED_B)
R/W
1
1: Port33_B LED OFF (Default)
0: Port33_B LED ON
1
Port33_G
(P30_Lane1_LED_G)
R/W
1
1: Port33_G LED OFF (Default)
0: Port33_G LED ON
0
Port33_R
(P30_Lane1_LED_R)
R/W
1
1: Port33_R LED OFF (Default)
0: Port33_R LED ON
5.12.4.52. Offset 0x41 SFP28 RGB LED -34 (Read& Write)
Bit
Name
R/W
Reset Value
Description
7:6
Reserve
NA
NA
5
Port36_Active_B
(P35_Lane2_LED_B)
R/W
0
1: Port36_B Active ON
0: Port36_B Active OFF (Default)
4
Port36_Active_G
(P35_Lane2_LED_G)
R/W
0
1: Port36_G Active ON
0: Port36_G Active OFF (Default)
3
Port36_Active_R
(P35_Lane2_LED_R)
R/W
0
1: Port36_R Active ON
0: Port36_R Active OFF (Default)
2
Port36_B
(P35_Lane2_LED_B)
R/W
1
1: Port36_B LED OFF (Default)
0: Port36_B LED ON
1
Port36_G
(P35_Lane2_LED_G)
R/W
1
1: Port36_G LED OFF (Default)
0: Port36_G LED ON
0
Port36_R
(P35_Lane2_LED_R)
R/W
1
1: Port36_R LED OFF (Default)
0: Port36_R LED ON
5.12.4.53. Offset 0x42 SFP28 RGB LED -35 (Read& Write)
Bit
Name
R/W
Reset Value
Description
7:6
Reserve
NA
NA
5
Port39_Active_B
(P40_Lane3_LED_B)
R/W
0
1: Port39_B Active ON
0: Port39_B Active OFF (Default)
4
Port39_Active_G
(P40_Lane3_LED_G)
R/W
0
1: Port39_G Active ON
0: Port39_G Active OFF (Default)
3
Port39_Active_R
(P40_Lane3_LED_R)
R/W
0
1: Port39_R Active ON
0: Port39_R Active OFF (Default)
2
Port39_B
(P40_Lane3_LED_B)
R/W
1
1: Port39_B LED OFF (Default)
0: Port39_B LED ON
1
Port39_G
(P40_Lane3_LED_G)
R/W
1
1: Port39_G LED OFF (Default)
0: Port39_G LED ON
0
Port39_R
(P40_Lane3_LED_R)
R/W
1
1: Port39_R LED OFF (Default)
0: Port39_R LED ON