Edge-Core AS7326-56X - Page 155

EDGECORE NETWORKS CORPORATION 2018
155
1
Port50_LED3_G
(P50_Lane2_LED_G)
R/W
1
1: Port50_LED3_G LED OFF (Default)
0: Port50_LED3_G LED ON
0
Port50_LED3_R
(P50_Lane2_LED_R)
R/W
1
1: Port50_LED3_R LED OFF (Default)
0: Port50_LED3_R LED ON
5.12.6.20. Offset 0x37 QSFP28 RGB LED -8 (Read& Write)
Bit
Name
R/W
Reset Value
Description
7:6
Reserve
NA
NA
5
Port50_LED4_Active_B
(P50_Lane3_LED_B)
R/W
0
1: Port50_LED4_B Active ON
0: Port50_LED4_B Active OFF (Default)
4
Port50_LED4_Active_G
(P50_Lane3_LED_G)
R/W
0
1: Port50_LED4_G Active ON
0: Port50_LED4_G Active OFF (Default)
3
Port50_LED4_Active_R
(P50_Lane3_LED_R)
R/W
0
1: Port50_LED4_R Active ON
0: Port50_LED4_R Active OFF (Default)
2
Port50_LED4_B
(P50_Lane3_LED_B)
R/W
1
1: Port50_LED4_B LED OFF (Default)
0: Port50_LED4_B LED ON
1
Port50_LED4_G
(P50_Lane3_LED_G)
R/W
1
1: Port50_LED4_G LED OFF (Default)
0: Port50_LED4_G LED ON
0
Port50_LED4_R
(P50_Lane3_LED_R)
R/W
1
1: Port50_LED4_R LED OFF (Default)
0: Port50_LED4_R LED ON
5.12.6.21. Offset 0x38 QSFP28 RGB LED -9 (Read& Write)
Bit
Name
R/W
Reset Value
Description
7:6
Reserve
NA
NA
5
Port51_LED1_Active_B
(P51_Lane0_LED_B)
R/W
0
1: Port51_LED1_B Active ON
0: Port51_LED1_B Active OFF (Default)
4
Port51_LED1_Active_G
(P51_Lane0_LED_G)
R/W
0
1: Port51_LED1_G Active ON
0: Port51_LED1_G Active OFF (Default)
3
Port51_LED1_Active_R
(P51_Lane0_LED_R)
R/W
0
1: Port51_LED1_R Active ON
0: Port51_LED1_R Active OFF (Default)
2
Port51_LED1_B
(P51_Lane0_LED_B)
R/W
1
1: Port51_LED1_B LED OFF (Default)
0: Port51_LED1_B LED ON
1
Port50_LED1_G
(P51_Lane0_LED_G)
R/W
1
1: Port51_LED1_G LED OFF (Default)
0: Port51_LED1_G LED ON
0
Port51_LED1_R
(P51_Lane0_LED_R)
R/W
1
1: Port51_LED1_R LED OFF (Default)
0: Port51_LED1_R LED ON
5.12.6.22. Offset 0x39 QSFP28 RGB LED -10 (Read& Write)
Bit
Name
R/W
Reset Value
Description
7:6
Reserve
NA
NA