HP 8114A - Page 35

EIP 8114A Specifications
Inhibit Input
Inhibit on Edge
Inhibit on Level
Input Impedance
Threshold
Input transitions
Input frequency
Minimum pulse width
Input sensitivity
Inhibit response time
An external TTL signal at the Inhibit Input can be used to inhibit the
pulse signal, holding the output signal at its baseline level.
An active edge inhibits the pulse signal until reset, from the front
panel, or HP-III
An active level inhibits the pulse signal
100 kQ
1.5 V (TTL) typical
Cl00 ns
dc to 5 MHz
100 ns typical
5300 mV,, typical
200 ns typical
Maximum external voltage
A
!
150 v
Trigger Modes
Continuous
A continuous train of pulses or bursts of pulses is generated
Triggered A transition (rising, falling, or both) at the external input or MANual
trigger key triggers a pulse or burst of pulses.
Gated Active level (high or low) at the external input or MANual Trigger key
enables pulses or bursts of pulses. The last pulse or burst of pulses is
always completed.
External Width
Period and width of the output signal are taken from a signal at the
External Input.
HP 8114A Pulse Generator 2-11