Intel® Server Board S2600CW Family TPS Appendix E: POST Code Diagnostic LED Decoder
Revision 2.4
Table 92. POST Progress Code LED Example
Results
Upper nibble bits = 1010b = Ah; Lower nibble bits = 1100b = Ch; the two are concatenated as ACh.
The following table provides a list of all POST progress codes.
Table 93. POST Progress Codes
First Post code after CPU reset
CRAM initialization begin
SEC Core At Power On Begin
Early CPU initialization during SEC phase
QPI RC (Fully leverage without platform change)
Collect info such as SBSP, Boot Mode, Reset type, etc.
Setup minimum path between SBSP and other sockets
Topology discovery and route calculation
Program final IO SAD setting
Protocol layer and other uncore settings
Transition links to full speed operation
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