Intel® Server Board S2600CW Family TPS Power Supply Specification Guidelines
Revision 2.4
10.3.2.11 DC/DC Converter Capacitive Loading
The DC/DC converters are stable and meet all requirements with the following capacitive
loading ranges. Minimum capacitive loading applies to static load only.
Table 81. Capacitive Loading Conditions
10.3.2.12 DC/DC Converters Closed Loop Stability
Each DC/DC converter is unconditionally stable under all line/load/transient load conditions
including capacitive load ranges specified in Section 10.3.2.11. A minimum of: 45 degrees
phase margin and -10dB-gain margin is required. The PDB provides proof of the unit’s
closed-loop stability with local sensing through the submission of Bode plots. Closed-loop
stability must be ensured at the maximum and minimum loads as applicable.
10.3.2.13 Common Mode Noise
The Common Mode noise on any output does not exceed 350mV pk-pk over the frequency
band of 10Hz to 20MHz.
The measurement shall be made across a 100Ω resistor between each of DC outputs,
including ground, at the DC power connector and chassis ground (power subsystem
enclosure).
The test set-up shall use a FET probe such as Tektronix* model P6046 or equivalent.
10.3.2.14 Ripple/Noise
The maximum allowed ripple/noise output of each DC/DC Converter is defined in the table
below. This is measured over a bandwidth of 0Hz to 20MHz at the PDB output connectors. A
10µF tantalum capacitor in parallel with a 0.1µF ceramic capacitor are placed at the point of
measurement.
Table 82. Ripple and Noise
The test setup shall be as shown below.
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