Intel Stratix 10

Figure 9. Connections for Avalon-ST x16 Single-Device Configuration
Intel® Stratix®10
nCONFIG
nSTATUS
CONF_DONE
INIT_DONE
OSC_CLK_1
MSEL[2:0]
AVST_DATA [15:0]
AVST_VALID
AVST_READY
AVST_CLK
Configuration
Data Signals
Configuration
Control Signals
Compact Flash Interface
External Compact Flash Memory
ADDR DATA
.rbf
(little endian)
Control
CPLD / FPGA
External Host
fpga_clk
fpga_ready
fpga_valid
fpga_conf_done
fpga_nstatus
fpga_nconfig
fpga_data [15:0]
10kΩ
MSEL
V
CCIO_SDM
16
3
Synchronizers
Parallel Flash Loader II IP
or
Microprocessor
or
Custom Logic
External Clock Source
(2)
(1)
3. Intel Stratix 10 Configuration Schemes
UG-S10CONFIG | 2018.11.02
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Intel Stratix 10 Configuration User Guide
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