Intel Stratix 10 Configuration User Guide

The CvP configuration scheme supports the following modes:
• CvP Initialization Mode:
In this mode an external configuration device stores the periphery image and it
loads into the FPGA through the Active Serial x4 (Fast mode) configuration
scheme. The host memory stores the core image and it loads into the FPGA
through the PCIe link.
After the periphery image configuration completes, the CONF_DONE signal goes
high and the FPGA starts PCIe link training. When PCIe link training completes, the
PCIe link transitions to the Link Training and Status State Machine (LTSSM) L0
state and then through PCIe enumeration. The PCIe host then configures the core
through the PCIe link. The PCIe reference clock must be running for the link for
link training.
After the core image configuration is complete, the CvP_CONFDONE pin (if
enabled) goes high, indicating the FPGA is fully configured.
• CvP Update Mode
CvP update mode is a reconfiguration scheme that allows an FPGA device to
deliver an updated bitstream to a target device after the device enters user mode.
In this mode, the FPGA device initializes by loading the full configuration image
from the external local configuration device to the FPGA or after CvP initialization.
You can perform CvP update on a device that you originally configure using CvP
initialization or any other configuration scheme.
Related Information
Intel Stratix 10 Configuration via Protocol (CvP) Implementation User Guide
4.3. Partial Reconfiguration
Partial reconfiguration (PR) allows you to reconfigure a portion of the FPGA
dynamically, while the remaining FPGA design continues to function. You can define
multiple personas for a region in your design, without impacting operation in areas
outside this region. This methodology is effective in systems with multiple functions
that time-share the same FPGA device resources. PR enables the implementation of
more complex FPGA systems.
Related Information
Intel Quartus Prime Pro Edition User Guide: Partial Reconfiguration
4. Stratix 10 Configuration Features
UG-S10CONFIG | 2018.11.02
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Intel Stratix 10 Configuration User Guide
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Intel Stratix 10 Specifications

General

Brand	Intel
Model	Stratix 10
Category	Control Unit
Language	English