Intel Stratix 10 Configuration User Guide

Figure 31. Connections for SD MMC Single-Device Configuration
Intel® Stratix®10
nCONFIG
nSTATUS
CONF_DONE
INIT_DONE
OSC_CLK_1
MSEL[2:0]
SDMMC_CFG_DATA
SDMMC_CFG_CCLK
SDMMC_CFG_CMD
SD/MMC
Configuration
Pins
Configuration
Control Signals
Configuration
Control Signals
Optional
Monitoring
Configuration Using SD/MMC Scheme
10kΩ
MSEL
V
CCIO_SDM
Optional
4 / 8
External
Level
Shifter
SD/MMC
DAT
CLK
CMD
SD – Secure Digital
2.7 ~ 3.6 v 1.8 v
MMC – Multi-Media Card
3
4 / 8
Note: The External Level Shifter is not mandatory for embedded multimedia cards (eMMC).
Related Information
Intel Stratix 10 Device Family Pin Connection Guidelines
3.4. JTAG Configuration
JTAG-chain device programming is ideal during development. You can reconfigure Intel
Stratix 10 using JTAG faster than you can reprogram flash memory. You can also use
JTAG to reprogram a corrupted flash memory that is preventing the Intel Stratix 10
device from configuring using its normal configuration scheme. The Intel Quartus
Prime software generates a .sof for JTAG configuration. Use the Intel Quartus Prime
Programmer with the Intel FPGA download cable to configure the Intel Stratix 10
device through its JTAG interface. The Intel FPGA Download Cable II and the Intel
FPGA Ethernet Cable can support the V
CCIO_SDM
supply at 1.8 V. Alternatively, you can
use the Jam*STAPL Format File (.jam) or Jam Byte Code File (.jbc) with other third-
party programmer tools.
Intel Stratix 10 devices automatically compress the configuration bitstream. You
cannot disable compression in Intel Stratix 10 devices.
3. Intel Stratix 10 Configuration Schemes
UG-S10CONFIG | 2018.11.02
Send Feedback
Intel Stratix 10 Configuration User Guide
63

Intel Stratix 10 Specifications

General

Brand	Intel
Model	Stratix 10
Category	Control Unit
Language	English