Intel Stratix 10 Configuration User Guide

5.3.1. Operation Commands
Table 28. Mailbox Client Intel Stratix 10FPGA IP Command List and Description
Command Code
(Hex)
Number
of
Command
s
(13)
Number
of
Response
s
(13)
Description
RSU_IMAGE_
UPDATE
5C 2 0 Triggers reconfiguration from data source or configuration data stored in
AS x4 flash memory.
This command takes a 64-bit argument to specify the reconfiguration
address in flash memory.
• Bit [63:32]: Reserved (write as 0).
• Bit [31:0]: The start address of an application image.
Returns non-zero response if the device is already processing a
configuration.
CONFIG_STA
TUS
4 0 6 Reports the status of the last reconfiguration. You can use this command
to check the configuration status during and after configuration. The
response contains the following fields:
Wor
d
Summa
ry
Description
0 State Describes the most recent configuration related error.
0 when no configuration errors.
The error field has 2 fields:
• Upper 16 bits: Major error code
• Lower 16 bits: Minor errors that do not contain
meaningful data.
Here are valid values for major error codes:
Major Error
Code
Description
0xF001 BITSTREAM_ERROR
0xF002 HARDWARE_ACCESS_FAILURE
0xF003 BITSTREAM_CORRUPTION
0xF004 INTERNAL_ERROR
0xF005 DEVICE_ERROR
0xF006 HPS_WATCHDOG_TIMEOUT
0xF007 INTERNAL_UNKNOWN_ERROR
1 Version 0 for this version.
2 Pin
status
Specifies the values of the following configuration
control signals.
•
Bit [31]: Current nSTATUS output value (active
low).
•
Bit [30]: Detected nCONFIG input value (active
low).
• Bit [29:8]: Reserved.
• Bit [7:0]: The MSEL value at power up.
3 Soft
function
status
Specifies the value of each of the soft functions,
whether you assigned the function assigned to an
SDM pin.
continued...
(13)
The number does not include the command and response header.
5. Remote System Upgrade
UG-S10CONFIG | 2018.11.02
Send Feedback
Intel Stratix 10 Configuration User Guide
79

Intel Stratix 10 Specifications

General

Brand	Intel
Model	Stratix 10
Category	Control Unit
Language	English