Debugging Suggestions
Here are some debugging tips for the AS configuration scheme:
• Ensure that the boot address for your configuration image is correctly defined
when generating the programming file for the flash. The boot address defaults to 0
for AS configuration.
• Ensure that the design meets the power-supply ramp requirements for fast AS
mode. If using fast mode, V
CCIO_SDM
must ramp up within 18 ms.
• Ensure that the flash is powered up and ready to be accessed when the Intel
Stratix 10 device exists power-on reset.
•
If you are using an external clock source for configuration, ensure the OSC_CLK_1
pin is fed correctly, and the frequency matches the frequency you set for the
OSC_CLK_1 in your Intel Quartus Prime Pro Edition project.
•
Ensure the MSEL pins reflect the correct AS configuration scheme.
• If the AS configuration is failing due to a corrupt image inside the serial flash
device, change the MSEL pins to JTAG only mode, verify that configuration is
successful over JTAG. Then, erase and reprogram the serial flash device.
• If you are using AS x4 flash memories, ensure that you use AS Fast mode, if you
are not concerned about 100 ms PCIe linkup, you must still ramp the V
CCIO_SDM
supply within 18 ms. This ramp-up requirement ensures that the AS x4 device is
within its operating voltage range when the Intel Stratix 10 device begins to
access it.
3.3. Configuration from SD MMC
Note: Contact your Intel sales representative for information about SD MMC support.
In the configuration scheme using SD memory cards, or MMC, the memory cards store
configuration. The SDM uses the on-chip SD or MMC controller to interface to the
memory cards. The SDM block reads the configuration data from the memory cards
for the configuration process. The configuration from SD and MMC supports x4 SD
memory cards and x8 MMC.
Table 25. Intel Stratix 10 Configuration Data Width, Clock Rates, and Data Rates
Mode Data Width
(bits)
Max Clock Rate Max Data Rate MSEL[2:0]
Active SD/MMC 4 or 8 50 MHz 400 Mbps 100
Related Information
• MSEL Settings on page 18
• SD MCC Configuration Timing in Intel Stratix 10 Devices
3.3.1. SD MMC Single-Device Configuration
Refer to the Intel Stratix 10 Device Family Pin Connection Guidelines for additional
information about individual pin usage and requirements.
3. Intel Stratix 10 Configuration Schemes
UG-S10CONFIG | 2018.11.02
Intel Stratix 10 Configuration User Guide
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