MEDIATEK Ralink MT7620 - Page 199

PGMT7620_V.1.0_040503
Page 199 of 523
MT7620 PROGRAMMING GUIDE
Integrated 802.11n MAC/BBP and 2.4 GHz RF/FEM Router-on-a-Chip
Bits
Type
Name
Description
Initial Value
7:0
RW
RXMAX_PTIME
Rx Maximum Pending Time
Specifies the maximum pending time for the
internal RX_DONE_INT. When the pending time
is equal to or greater than RXMAX_PTIME x 20
μs, or the number of pended RX_DONE_INT is
equal to or greater than RXMAX_PCNT (see
above), a final RX_DLY_INT is generated.
0: Disable this feature.
0
238. FREEQ_THRES: (offset: 0x1210)
Bits
Type
Name
Description
Initial Value
31:4
-
-
Reserved
4:0
RW
FREEQ_THRES
Blocks this interface when Rx descriptors reach
this threshold.
0x2
239. INT_STATUS: (offset: 0x1220, default: 0x0000_0000)
Bits
Type
Name
Description
Initial Value
31
R/
W1C
RX_COHERENT
Rx Coherent Interrupt
Asserts when the Rx DMA is ready to handle a
queue, but cannot access the queue because
the driver is not ready.
0
30
R/
W1C
RX_DLY_INT
Rx Delay Interrupt
Asserts when the number of pended Rx
interrupts has reached a specified level, or
when the pending time is reached. Configure
this interrupt using the DELAY_INT_CFG
register.
0
29
R/
W1C
TX_COHERENT
Tx Coherent Interrupt
Asserts when the Tx DMA is ready to handle a
queue, but cannot access the queue because
the driver is not ready.
0
28
R/
W1C
TX_DLY_INT
Tx Delay Interrupt
Asserts when the number of pended Tx
interrupts has reached a specified level, or
when the pending time is reached. Configure
this interrupt using the DELAY_INT_CFG
register.
0
27
RW
MCU_CMD_INT3
MCU command interrupt 3: Reserved
0
26
RW
MCU_CMD_INT2
MCU command interrupt 2: Reserved
0
25
RW
MCU_CMD_INT1
MCU command interrupt 1: Reserved
0
24
RW
MCU_CMD_INT0
MCU command interrupt 0: Reserved
0
23:18
-
-
Reserved
-
17
R/
W1C
RX_DONE_INT1
Rx Queue 1 Done Interrupt
Asserts when an Rx packet is received on
Queue 1.
0