MEDIATEK Ralink MT7620 - Page 287

PGMT7620_V.1.0_040503
Page 287 of 523
MT7620 PROGRAMMING GUIDE
Integrated 802.11n MAC/BBP and 2.4 GHz RF/FEM Router-on-a-Chip
Bits
Type
Name
Description
Initial Value
9
RW
DHCP4_BPDU_FR
DHCPv4 as BPDU Frame
1’b0: Non-BPDU Frame
1’b1: Regarded as BPDU frame
0x0
8:6
RW
DHCP4_EG_TAG
DHCPv4 Egress VLAN Tag Attribution
3’b000: System default (disabled)
3’b001: Consistent
3’b010, 3’b011: Reserved
3’b100: Untagged
3’b101: Swap
3’b110: Tagged
3’b111: Stack
0x0
5
RW
DHCP4_LKY_VLAN
DHCPv4 CP Leaky VLAN Enable
1’b0: Disable
1’b1: Enable
0x0
4
RW
DHCP4_PRI_HIGH
DHCPv4 Force the Highest Priority
1’b0: System default
1’b1: Assigned to the highest priority queue
0x1
3
RW
DHCP4_MIR
DHCPv4 Mirror Port
1’b0: Disable
1’b1: Frame copied to Mirror port
0x0
2:0
RW
DHCP4_PORT_FW
DHCPv4 TO_CPU Forwarding
3’b0xx: System default (disable)
3’b100: System default and CPU port excluded
3’b101: System default and CPU port included
3’b110: CPU port only (As long as the ingress
port is not the CPU port. If the ingress port
is the CPU port, then the system default
and CPU port are excluded.)
3’b111: Frame dropped
0x0
330. VTIM1: VID to Table Index Map 1 Register (offset: 0x0100)
Bits
Type
Name
Description
Initial Value
31:24
-
-
Reserved
0x0
23:12
RW
VID1
VLAN Identifier for VLAN Table Index 1
0x002
11:0
RW
VID0
VLAN Identifier for VLAN Table Index 0
0x001
331. VTIM2: VID to Table Index Map 2 Register (offset: 0x0104)
Bits
Type
Name
Description
Initial Value
31:24
-
-
Reserved
0x0
23:12
RW
VID3
VLAN Identifier for VLAN Table Index 3
0x004
11:0
RW
VID2
VLAN Identifier for VLAN Table Index 2
0x003
332. VTIM3: VID to Table Index Map 3 Register (offset: 0x0108)
Bits
Type
Name
Description
Initial Value
31:24
-
-
Reserved
0x0