MEDIATEK Ralink MT7620 - Page 358

PGMT7620_V.1.0_040503
Page 358 of 523
MT7620 PROGRAMMING GUIDE
Integrated 802.11n MAC/BBP and 2.4 GHz RF/FEM Router-on-a-Chip
2.21.4 PCI/PCIe Master Access In Host Mode
For PCI/PCIe Memory space access, there are two approaches. One approach is fixed mapping the address
space from 32’h2000_0000 to 32’h2FFF_FFFF (256 MByte). The other apprach is PCI memory space
programmable mapping which is supported via the membase register + memwin offset. For PCI I/O space
access, the PCI controller supports programmable mapping via iobase register + iowin offset.
64 KB
Memory
Window
System memory
space
MEMWIN
PCI Memory Space
BASE+0x0
BASE+0xFFFF
Offset= 0x0
Offset= 0xFFFF
membase+0x0
membase+0xFFFF
Figure 2-36 PCIe Memory Space Programmable Mapping
System memory
space
0x2000_0000
0x2FFF_FFFF
PCI Memory Space
0x2000_0000
0x2FFF_FFFF
Figure 2-37 PCI Memory Space Fixed Mapping
64 KB
IO
Window
System memory
space
IOWIN
PCI IO Space
BASE+0x0
BASE+0xFFFF
Offset= 0x0
Offset= 0xFFFF
iobase+0x0
iobase+0xFFFF
Figure 2-38 I/O Space Programmable Mapping