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PGMT7620_V.1.0_040503
Page 359 of 523
MT7620 PROGRAMMING GUIDE
Integrated 802.11n MAC/BBP and 2.4 GHz RF/FEM Router-on-a-Chip
2.21.5 PCIe Controller Host Mode Initializaton Example
1. Set the PCIRST bit in PCICFG register to assert reset the PCI device card, then reset the PCIRST bit to de-
assert the reset output.
2. PCI driver performs PCI scan to detect PCIe devices and make device initialization.
2.21.6 Host-PCI Bridge Registers (base: 0x1014_0000)
2.21.6.1 List of Registers
No.
Offset
Register Name
Description
Page
428
0x0000
PCICFG
PCI Configuration and Status Register
360
429
0x0008
PCIINT
PCI Interrupt After Enable Mask
360
430
0x000C
PCIENA
PCI Interrupt Enable
360
431
0x0020
CFGADDR
CONFIG_ADDR Register
361
432
0x0024
CFGDATA
CONFIG_DATA Register
361
433
0x0028
MEMBASE
Base Address for Memory Space Window
361
434
0x002C
IOBASE
Base Address for IO Space Window
361
435
0x0090
PHY0_CFG
PCIe PHY0 Control Register via SPI Configuration
362

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