MEDIATEK Ralink MT7620 - Page 371

PGMT7620_V.1.0_040503
Page 371 of 523
MT7620 PROGRAMMING GUIDE
Integrated 802.11n MAC/BBP and 2.4 GHz RF/FEM Router-on-a-Chip
2.22.4.2 Register Descriptions
447. INT_STATUS: (offset: 0x0200)
Bits
Type
Name
Description
Initial Value
31:21
-
-
Reserved
0x0
20
R/
W1C
RADAR_INT
Baseband Radar Interrupt
Asserts when the BBP has detected radar tones.
0x0
19:18
-
-
Reserved
0x0
17
R/
W1C
TX_COHERENT
Tx Coherent Interrupt
Asserts when the Tx DMA is ready to handle a
queue, but cannot access the queue because
the driver is not ready.
0x0
16
R/
W1C
RX_COHERENT
Rx Coherent Interrupt
Asserts when the Rx DMA is ready to handle a
queue, but cannot access the queue because
the driver is not ready.
0x0
15
R/
W1C
MAC_INT_4
MAC Interrupt 4: General Purpose Timer
Interrupt
Asserts when the GP timer has timed out.
Configure this timer using the INT_TIMER_CFG
register.
0x0
14
R/
W1C
MAC_INT_3
MAC Interrupt 3: Auto-wakeup Interrupt
Asserts when the auto-wakeup function has
been triggered. Configure this interrupt using
the AUTO_WAKEUP_CFG register.
0x0
13
R/
W1C
MAC_INT_2
MAC Interrupt 2: Tx Status Interrupt
Asserts when the status of the Tx queue
becomes valid.
0x0
12
R/
W1C
MAC_INT_1
MAC Interrupt 1: Pre-TBTT Interrupt
Asserts at an interval before the TBTT interrupt
is triggered. Configure this interrupt using the
INT_TIMER_CFG register.
0x0
11
R/
W1C
MAC_INT_0
Asserts when the TBTT timer has counted down
to zero. Configure this interrupt using the
BCN_TIME_CFG register.
0x0
10
RO
TX_RX_COHERENT
Tx/Rx Coherent Interrupt
Asserts when TX_COHERENT [17] or
RX_COHERENT [18] asserts.
0x0
9
R/
W1C
MCU_CMD_INT
MCU Command Interrupt
Asserts when MCU has made a command and
asserted an interrupt to the host.
0x0
8
R/
W1C
TX_DONE_INT5
Tx Queue 5 Done Interrupt
Asserts when a Tx Queue 5 packet is
transmitted.
0x0