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PGMT7620_V.1.0_040503
Page 372 of 523
MT7620 PROGRAMMING GUIDE
Integrated 802.11n MAC/BBP and 2.4 GHz RF/FEM Router-on-a-Chip
Bits
Type
Name
Description
Initial Value
7
R/
W1C
TX_DONE_INT4
Tx Queue 4 Done Interrupt
Asserts when a Tx Queue 4 packet is
transmitted.
0x0
6
R/
W1C
TX_DONE_INT3
Tx Queue 3 Done Interrupt
Asserts when a Tx Queue 3 packet is
transmitted.
0x0
5
R/
W1C
TX_DONE_INT2
Tx Queue 2 Done Interrupt
Asserts when a Tx Queue 2 packet is
transmitted.
0x0
4
R/
W1C
TX_DONE_INT1
Tx Queue 1 Done Interrupt
Asserts when a Tx Queue 1 packet is
transmitted.
0x0
3
R/
W1C
TX_DONE_INT0
Tx Queue 0 Done Interrupt
Asserts when a Tx Queue 0 packet is
transmitted.
0x0
2
R/
W1C
RX_DONE_INT
Rx Done Interrupt
Asserts when an Rx packet is received.
0x0
1
R/
W1C
TX_DLY_INT
Tx Delay Interrupt
Asserts when the number of pending Tx
interrupts has reached a specified level, or
when the pending time is reached. Configure
this interrupt using the DELAY_INT_CFG
register.
0x0
0
R/
W1C
RX_DLY_INT
Tx Delay Interrupt
Asserts when the number of pended Rx
interrupts has reached a specified level, or
when the pending time is reached. Configure
this interrupt using the DELAY_INT_CFG
register.
0x0
NOTE:
Read
0: Interrupt not asserted.
1: Interrupt asserted
Write
1: Clear the interrupt
448. INT_MASK: (offset: 0x0204)
Bits
Type
Name
Description
Initial Value
31:21
-
-
Reserved
0x0
20
RW
RADAR_INT_EN
Enables the Baseband Radar interrupt. This
interrupt asserts when the BBP has detected
radar tones.
0x0
19:18
-
-
Reserved
0x0
17
RW
TX_COHERENT_EN
Enables the Tx Coherent interrupt. This
interrupt asserts when the Tx DMA is ready to
handle a queue, but cannot access the queue
because the driver is not ready.
0x0

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