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MEDIATEK Ralink MT7620 - Page 38

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PGMT7620_V.1.0_040503
Page 38 of 523
MT7620 PROGRAMMING GUIDE
Integrated 802.11n MAC/BBP and 2.4 GHz RF/FEM Router-on-a-Chip
Bits
Type
Name
Description
Initial Value
13
RW
WLED_GPIO_MODE
WLAN LED GPIO Share Mode
Sets the WLAN LED pin to operate in GPIO
mode.
0: Normal mode
1: GPIO Mode
0x1
12
RW
SPI_REFCLK0_MODE
SPI Reference Clock GPO Share Mode
Sets SPI pins to operate in reference clock and
GPO mode.
0: Normal SPI mode
1: SPI_CS1 pins are shared with the reference
clock and GPO mode.
0x1
11
RW
SPI_GPIO_MODE
SPI GPIO Share Mode
Sets the SPI pins to operate in GPIO mode.
0: Normal Mode
1: GPIO Mode
0x0
10
RW
RGMII2_GPIO_MODE
RGMII2 GPIO Share Mode
Sets the RGMII2 pins to operate in GPIO mode.
0: Normal Mode
1: GPIO Mode
0x1
9
RW
RGMII1_GPIO_MODE
RGMII1 GPIO Share Mode
Sets the RGMII1 pins to operate in GPIO mode.
0: Normal Mode
1: GPIO Mode
0x1
8:7
RW
MDIO_GPIO_MODE
MDIO GPIO Share Mode
Sets the MDIO pin to operate in GPIO mode.
2’b00: Normal Mode
2’b01: REF_CLK Mode
2’b10: GPIO Mode
2’b11: Reserved
0x2
6
-
-
Reserved
0x0
5
RW
UARTL_GPIO_MODE
UART Lite GPIO Share Mode
Sets the UART Lite pins to operate in GPIO
mode.
0: Normal Mode
1: GPIO Mode
0x1
4:2
RW
UARTF_SHARE_MODE
UART Full Interface Share Mode
Sets the UART Full interface to operate in PCM,
I2S, and GPIO mode.
A detailed description of the UARTF Mode Pin
Sharing scheme is shown in the datasheet for
this chip.
0x7
1
-
-
Reserved
0x0
0
RW
I2C_GPIO_MODE
I2C GPIO Share Mode
Sets the I2C pins to operate in GPIO mode.
0: Normal Mode
1: GPIO Mode
0x1

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