MEDIATEK Ralink MT7620 - Page 37

PGMT7620_V.1.0_040503
Page 37 of 523
MT7620 PROGRAMMING GUIDE
Integrated 802.11n MAC/BBP and 2.4 GHz RF/FEM Router-on-a-Chip
Bits
Type
Name
Description
Initial Value
31:30
RW
SUTIF_SHARE_MODE
Serial UTIF Pin Share Mode
Sets the serial UTIF pin to operate in UARTL or
I
2
C mode.
0: Not shared
1: Shared with UARTL -overwrites the
UARTLITE_GPIO_MODE setting.
2: Shared with I
2
C - overwrites the
I2C_GPIO_MODE setting.
3: Reserved
0x0
29:23
-
-
Reserved
0x0
22:21
RW
WDT_RST_MODE
Watchdog Timer GPIO Share Mode
Sets the watchdog timer reset pin to operate in
REFCLK_OUT or GPIO mode.
0: WDT_RST_N (normal mode)
1: REFCLK0_OUT
2: GPIO mode
3: Reserved
0x0
20
RW
PA_G_GPIO_MODE
Power Amplifier GPIO Share Mode
Sets the power amplifier pin to operate in GPIO
mode.
0: PA_PE_G0/PA_PE_G1/ANT_TRN/ANT_TRNB
(normal mode)
1: GPIO Mode
0x1
19:18
RW
ND_SD_GPIO_MODE
NAND/SD GPIO Share Mode
Sets the ND pins to operate in SD, BT or GPIO
mode.
0: ND Mode
1: SD Mode (BT Coexist)
2: GPIO Mode
3: Reserved
0x2
17:16
RW
PERST_GPIO_MODE
PCIe Reset GPIO Share Mode
Sets the PERST_N pin to operate in REFCLK0 or
GPIO mode.
2’b00: PERST_N (normal mode)
2’b01: REFCLK0_OUT
2’b10: GPIO mode
2’b11: Reserved
0x2
15
RW
EPHY_LED_GPIO _MODE
LED JTAG GPIO Share Mode
Sets an LED pin to operate in JTAG or GPIO
mode.
0: Normal Mode (JTAG/EPHY_LED depending on
bootstrapping settings)
1: GPIO Mode
0x0
14
-
-
Reserved
0x0