MEDIATEK Ralink MT7620 - Page 4

PGMT7620_V.1.0_040503
Page 4 of 523
MT7620 PROGRAMMING GUIDE
Integrated 802.11n MAC/BBP and 2.4 GHz RF/FEM Router-on-a-Chip
2.9.4 REGISTER DESCRIPTIONS (BASE: 0X1000_0900) 99
2.10 NAND FLASH CONTROLLER 105
2.10.1 FEATURES 105
2.10.2 NORMAL MODE FLOW 105
2.10.3 ECC 105
2.10.4 LIST OF REGISTERS 108
2.10.5 REGISTER DESCRIPTIONS (BASE: 0X1000_0800) 109
2.11 PCM CONTROLLER 116
2.11.1 FEATURES 116
2.11.2 BLOCK DIAGRAM 116
2.11.3 LIST OF REGISTERS 118
2.11.4 REGISTER DESCRIPTIONS (BASE: 0X1000_2000) 119
2.11.5 PCM CONFIGURATION 130
2.12 GENERIC DMA CONTROLLER 132
2.12.1 FEATURES 132
2.12.2 BLOCK DIAGRAM 132
2.12.3 PERIPHERAL CHANNEL CONNECTION 133
2.12.4 LIST OF REGISTERS 134
2.12.5 REGISTER DESCRIPTIONS (BASE: 0X1000_2800) 135
2.13 SPI CONTROLLER 139
2.13.1 FEATURES 139
2.13.2 BLOCK DIAGRAM 139
2.13.3 LIST OF REGISTERS 140
2.13.4 REGISTER DESCRIPTIONS (BASE: 0X1000_0B00) 141
2.14 I2S CONTROLLER 152
2.14.1 FEATURES 152
2.14.2 BLOCK DIAGRAM 152
2.14.3 I
2
S SIGNAL TIMING FOR I
2
S DATA FORMAT 153
2.14.4 LIST OF REGISTERS 154
2.14.5 REGISTER DESCRIPTIONS (BASE: 0X1000_0A00) 155
2.15 MEMORY CONTROLLER 159
2.15.1 FEATURES 159
2.15.2 BLOCK DIAGRAM 159
2.15.3 SDRAM INITIALIZATION SEQUENCE 159
2.15.4 SDRAM POWER SAVING CONFIGURATION 160
2.15.5 DDR INITIALIZATION SEQUENCE 161
2.15.6 LIST OF REGISTERS 162
2.15.7 REGISTER DESCRIPTIONS (BASE: 0X1000_0300) 163
2.16 RBUS MATRIX AND QOS ARBITER 178
2.16.1 FEATURES 178
2.16.2 BLOCK DIAGRAM 178
2.16.3 LIST OF REGISTERS 179
2.16.4 REGISTER DESCRIPTIONS (BASE: 0X1000_0400) 180
2.17 USB HOST CONTROLLER & PHY 183
2.17.1 FEATURES 183
2.17.2 BLOCK DIAGRAM 183
2.17.3 REGISTER DESCRIPTION (BASE: 0X101C.0000) 183
2.17.4 EHCI OPERATION REGISTERS (BASE: 0X101C.0000) 184