MEDIATEK Ralink MT7620 - Page 86

PGMT7620_V.1.0_040503
Page 86 of 523
MT7620 PROGRAMMING GUIDE
Integrated 802.11n MAC/BBP and 2.4 GHz RF/FEM Router-on-a-Chip
76. GPIO23_00_DIR: PIO Pin Direction (offset: 0x0024)
Bits
Type
Name
Description
Initial Value
31:24
-
-
Reserved
-
23:0
RW
PIODIR
PIO Pin Direction
Sets the data direction on PIO pins
corresponding to bits in this register.
0: Set data direction to input.
1: Set data direction to output.
The values driven onto the PIO pins are
controlled by the PIOPOL and PIODATA
registers.
0x0
77. GPIO23_00_POL: PIO Pin Polarity (offset: 0x0028)
Bits
Type
Name
Description
Initial Value
31:24
-
-
Reserved
-
23:0
RW
PIOPOL
PIO Pin Polarity
Sets the polarity of data on PIO pins
corresponding to bits in this register.
0: Maintain original polarity
1: Invert existing polarity
NOTE: The polarity controls affect both input
and output modes.
0x0
78. GPIO23_00_SET: Set PIO Pin Data Bit (offset: 0x002C)
Bits
Type
Name
Description
Initial Value
31:24
-
-
Reserved
-
23:0
W
PIOSET
PIO Pin Set
Sets the corresponding bit in the PIODATA
output register.
0: No effect.
1: Set the selected PIODATA bit.
0x0
79. GPIO23_00_RESET: Clear PIO Pin Data Bit (offset: 0x0030)
Bits
Type
Name
Description
Initial Value
31:24
-
-
Reserved
-
23:0
W
PIORESET
PIO Pin Reset
Clears the corresponding bit in the PIODATA
output register.
0: No effect.
1: Clear the selected PIODATA bit.
0x0
80. GPIO23_00_TOG: Toggle PIO Pin Data Bit (offset: 0x0034)
Bits
Type
Name
Description
Initial Value
31:24
-
-
Reserved
-