Renesas M16C Series - Page 226

Clock-Asynchronous Serial I/O
M30240 Group
Rev.1.00 Sep 24, 2003 Page 208 of 360
Figure 2.60: UARTi related registers (4)
UARTi transmit/receive control register 1
Symbol
Address
When reset
UiC1(i=0,1)
03A5
16,03AD16
02
16
b7 b6 b5 b4 b3 b2 b1 b0
Bit name
Bit
symbol
WR
Function
(During UART mode)
Function
(During clock synchronous
serial I/O mode)
TE
TI
RE
RI
Transmit enable bit
Receive enable bit
Receive complete flag
Transmit buffer
empty flag
0 : Transmission disabled
1 : Transmission enabled
0 : Data present in
transmit buffer register
1 : No data present in
transmit buffer register
0 : Reception disabled
1 : Reception enabled
0 : Transmission disabled
1 : Transmission enabled
0 : Data present in
transmit buffer register
1 : No data present in
transmit buffer register
0 : Reception disabled
1 : Reception enabled
0 : No data present in
receive buffer register
1 : Data present in
receive buffer register
0 : No data present in
receive buffer register
1 : Data present in
receive buffer register
Nothing is assigned.
UART2 transmit/receive control register 1
Symbol
Address
When reset
U2C1
037D
16
02
16
b7 b6 b5 b4 b3 b2 b1 b0
Bit name
Bit
symbol
WR
Function
(During UART mode)
Function
(During clock synchronous
serial I/O mode)
TE
TI
RE
RI
Transmit enable bit
Receive enable bit
Receive complete flag
Transmit buffer
empty flag
0 : Transmission disabled
1 : Transmission enabled
0 : Data present in
transmit buffer register
1 : No data present in
transmit buffer register
0 : Reception disabled
1 : Reception enabled
0 : Transmission disabled
1 : Transmission enabled
0 : Data present in
transmit buffer register
1 : No data present in
transmit buffer register
0 : Reception disabled
1 : Reception enabled
0 : No data present in
receive buffer register
1 : Data present in
receive buffer register
0 : No data present in
receive buffer register
1 : Data present in
receive buffer register
U2IRS UART2 transmit interrupt
cause select bit
0 : Transmit buffer empty
(TI = 1)
1 : Transmit is completed
(TXEPT = 1)
0 : Transmit buffer empty
(TI = 1)
1 : Transmit is completed
(TXEPT = 1)
U2RRM UART2 continuous
receive mode enable bit
0 : Continuous receive
mode disabled
1 : Continuous receive
mode enabled
Invalid
Data logic select bit 0 : No reverse
1 : Reverse
0 : No reverse
1 : Reverse
U2LCH
U2ERE Error signal output
enable bit
Must be fixed to “0” 0 : Output disabled
1 : Output enabled
Write "0" when writing to these bits. The value will be "0" when read.