SONIX SN32F264 - Usb Registers; USB Interrupt Enable Register (USB_INTEN)

SN32F260 Series
32-Bit Cortex-M0 Micro-Controller
SONiX TECHNOLOGY CO., LTD Page 108 Version 1.5
10.9 USB REGISTERS
Base Address: 0x4005 C000
R: read only, W: write only, R/W: both read and write
Register
Offset
R/W
Description
Reset Value
USB_INTEN
0x00
R/W
USB Interrupt Enable Register.
0x0000_0000
USB_INSTS
0x04
R
USB Interrupt Event Status Register.
0x0000_0000
USB_INSTSC
0x08
W
USB Interrupt Event Status Clear Register.
0x0000_0000
USB_ADDR
0x0C
R/W
USB Device Address Register.
0x0000_0000
USB_CFG
0x10
R/W
USB Configuration Register.
0x0000_0000
USB_SGCTL
0x14
R/W
USB Signal Control Register.
0x0000_0000
USB_EP0CTL
0x18
R/W
USB Endpoint 0 Control Register.
0x0000_0000
USB_EP1CTL
0x1C
R/W
USB Endpoint 1 Control Register.
0x0000_0000
USB_EP2CTL
0x20
R/W
USB Endpoint 2 Control Register.
0x0000_0000
USB_EP3CTL
0x24
R/W
USB Endpoint 3 Control Register.
0x0000_0000
USB_EP4CTL
0x28
R/W
USB Endpoint 4 Control Register.
0x0000_0000
USB_EPTOGGLE
0x3C
R/W
USB Endpoint Data Toggle Register.
0x0000_003F
USB_EP1BUFOS
0x48
R/W
USB Endpoint 1 Buffer Offset Register.
0x0000_0040
USB_EP2BUFOS
0x4C
R/W
USB Endpoint 2 Buffer Offset Register.
0x0000_0080
USB_EP3BUFOS
0x50
R/W
USB Endpoint 3 Buffer Offset Register.
0x0000_00C0
USB_EP4BUFOS
0x54
R/W
USB Endpoint 4 Buffer Offset Register.
0x0000_00E0
USB_FRMNO
0x60
R
USB Frame Number Register.
0x0000_0000
USB_ PHYPRM
0x64
R/W
USB PHY Parameter Register.
0x0000_0000
USB_PHYPRM2
0x6C
R/W
USB PHY Parameter Register 2
0x0000_0000
USB_PS2CTL
0x70
R/W
USB PS/2 Control Register.
0x0000_0000
USB_RWADDR
0x78
R/W
USB FIFO Read/Write Address Register
0x0000_0000
USB_RWDATA
0x7C
R/W
USB FIFO Data Register
0x0000_0000
USB_RWSTATUS
0x80
R/W
USB FIFO Read/Write Status Register
0x0000_0000
USB_RWADDR2
0x84
R/W
USB FIFO Read/Write Address Register2
0x0000_0000
USB_RWDATA2
0x88
R/W
USB FIFO Data Register2
0x0000_0000
USB_RWSTATUS2
0x8C
R/W
USB FIFO Read/Write Status Register2
0x0000_0000
10.9.1 USB Interrupt Enable Register (USB_INTEN)
Address Offset: 0x00
Reset value: 0x0000 0000
Bit
Name
Description
Attribute
Reset
31
BUS_IE
Bus Event Interrupt Enable.
0: Disable BUS event interrupt.
1: Enable Bus event interrupt. Any bus event including BUS_RESET,
BUS_SUSPEND, and BUS_RESUME triggers USB interrupt.
R/W
0
30
USB_SOF_IE
USB SOF Interrupt Enable.
0: Disable USB SOF interrupt.
1: Enable USB SOF interrupt.
R/W
0
29
USB_IE
USB Event Interrupt Enable.
0: Disable USB event interrupt.
1: Enable USB event interrupt. Any USB event except EP1~EP6’s NAK
triggers USB interrupt.
R/W
0
28
BUSWK_IE
BUSWK_IE: Bus Wake Up Interrupt Enable.
0: Disable Wake Up event interrupt.
1: Enable Wake Up event interrupt.
R/W
0
27:5
Reserved
R
0
4
EPN_ACK_EN
Enable all of EP(1~4) ACK Interrupt
0: Disable EP1 to 4 ACK interrupt function.
1: Enable EP1 to 4 ACK interrupt function.
R/W
0