SONIX SN32F264 - Pmu Registers; Power Control Register (PMU_CTRL)

SN32F260 Series
32-Bit Cortex-M0 Micro-Controller
SONiX TECHNOLOGY CO., LTD Page 52 Version 1.5
4.7 PMU REGISTERS
Base Address: 0x4003 2000
4.7.1 Power Control register (PMU_CTRL)
Address Offset: 0x40
The power control register selects whether one of the ARM Cortex-M0 controlled power-down modes (Sleep mode or
Deep-sleep mode) is entered and provides the flags for Sleep or Deep-sleep modes respectively.
Bit
Name
Description
Attribute
Reset
31:3
Reserved
R
0
2:0
MODE[2:0]
Low power mode selection
010: WFI instruction will make MCU enter Deep-sleep mode.
100: WFI instruction will make MCU enter Sleep mode.
Other: Disable
R/W
0