SONIX SN32F264 - Ct16 Bn Match Control Register 2(Ct16 Bn_Mctrl2) (N=1)

SN32F260 Series
32-Bit Cortex-M0 Micro-Controller
SONiX TECHNOLOGY CO., LTD Page 68 Version 1.5
1
MR0RST
Enable reset TC when MR0 matches TC.
0: Disable.
1: Enable.
R/W
0
0
MR0IE
Enable generating an interrupt based on CM[2:0] when MR0 matches the
value in the TC.
0: Disable.
1: Enable.
R/W
0
6.7.8 CT16Bn Match Control register 2(CT16Bn_MCTRL2) (n=1)
Address Offset: 0x18
Bit
Name
Description
Attribute
Reset
31:30
Reserved
R
0
29
MR19STOP
Stop MR19: TC and PC will stop and CEN bit will be cleared if MR19
matches TC.
0: Disable.
1: Enable.
R/W
0
28
MR19RST
Enable reset TC when MR19 matches TC.
0: Disable.
1: Enable.
R/W
0
27
MR19IE
Enable generating an interrupt based on CM[2:0] when MR19 matches the
value in the TC.
0: Disable.
1: Enable.
R/W
0
26
MR18STOP
Stop MR18: TC and PC will stop and CEN bit will be cleared if MR18
matches TC.
0: Disable.
1: Enable.
R/W
0
25
MR18RST
Enable reset TC when MR18 matches TC.
0: Disable.
1: Enable.
R/W
0
24
MR18IE
Enable generating an interrupt based on CM[2:0] when MR18 matches the
value in the TC.
0: Disable.
1: Enable.
R/W
0
23
MR17STOP
Stop MR17: TC and PC will stop and CEN bit will be cleared if MR17
matches TC.
0: Disable.
1: Enable.
R/W
0
22
MR17RST
Enable reset TC when MR17 matches TC.
0: Disable.
1: Enable.
R/W
0
21
MR17IE
Enable generating an interrupt based on CM[2:0] when MR17 matches the
value in the TC.
0: Disable.
1: Enable.
R/W
0
20
MR16STOP
Stop MR16: TC and PC will stop and CEN bit will be cleared if MR16
matches TC.
0: Disable.
1: Enable.
R/W
0
19
MR16RST
Enable reset TC when MR16 matches TC.
0: Disable.
1: Enable.
R/W
0
18
MR16IE
Enable generating an interrupt based on CM[2:0] when MR16 matches the
value in the TC.
0: Disable.
1: Enable.
R/W
0
17
MR15STOP
Stop MR15: TC and PC will stop and CEN bit will be cleared if MR15
matches TC.
0: Disable.
1: Enable.
R/W
0