SONIX SN32F264 - Page 69

SN32F260 Series
32-Bit Cortex-M0 Micro-Controller
SONiX TECHNOLOGY CO., LTD Page 69 Version 1.5
16
MR15RST
Enable reset TC when MR15 matches TC.
0: Disable.
1: Enable.
R/W
0
15
MR15IE
Enable generating an interrupt based on CM[2:0] when MR15 matches the
value in the TC.
0: Disable.
1: Enable.
R/W
0
14
MR14STOP
Stop MR14: TC and PC will stop and CEN bit will be cleared if MR14
matches TC.
0: Disable.
1: Enable.
R/W
0
13
MR14RST
Enable reset TC when MR14 matches TC.
0: Disable.
1: Enable.
R/W
0
12
MR14IE
Enable generating an interrupt based on CM[2:0] when MR14 matches the
value in the TC.
0: Disable.
1: Enable.
R/W
0
11
MR13STOP
Stop MR13: TC and PC will stop and CEN bit will be cleared if MR13
matches TC.
0: Disable.
1: Enable.
R/W
0
10
MR13RST
Enable reset TC when MR13 matches TC.
0: Disable.
1: Enable.
R/W
0
9
MR13IE
Enable generating an interrupt based on CM[2:0] when MR13 matches the
value in the TC.
0: Disable.
1: Enable.
R/W
0
8
MR12STOP
Stop MR12: TC and PC will stop and CEN bit will be cleared if MR12
matches TC.
0: Disable.
1: Enable.
R/W
0
7
MR12RST
Enable reset TC when MR12 matches TC.
0: Disable.
1: Enable.
R/W
0
6
MR12IE
Enable generating an interrupt based on CM[2:0] when MR12 matches the
value in the TC.
0: Disable.
1: Enable.
R/W
0
5
MR11STOP
Stop MR11: TC and PC will stop and CEN bit will be cleared if MR11
matches TC.
0: Disable.
1: Enable.
R/W
0
4
MR11RST
Enable reset TC when MR11 matches TC.
0: Disable.
1: Enable.
R/W
0
3
MR11IE
Enable generating an interrupt based on CM[2:0] when MR11 matches the
value in the TC.
0: Disable.
1: Enable.
R/W
0
2
MR10STOP
Stop MR10: TC and PC will stop and CEN bit will be cleared if MR10
matches TC.
0: Disable.
1: Enable
R/W
0
1
MR10RST
Enable reset TC when MR10 matches TC.
0: Disable.
1: Enable.
R/W
0
0
MR10IE
Enable generating an interrupt based on CM[2:0] when MR10 matches the
value in the TC.
0: Disable.
1: Enable.
R/W
0