SN32F260 Series
32-Bit Cortex-M0 Micro-Controller
SONiX TECHNOLOGY CO., LTD Page 40 Version 1.5
3.2.2 SYSTEM CLOCK (SYSCLK) SELECTION
After a system reset, the IHRC is selected as system clock. When a clock source is used directly as system clock, it is
not possible to stop it.
A switch from one clock source to another occurs only if the target clock source is ready (clock stable after startup
delay). If a clock source which is not yet ready is selected, the switch will occur when the clock source is ready.
Ready bits in SYS0_CSST register indicate which clock(s) is (are) ready and SYSCLKST bits in SYS0_CLKCFG
register indicate which clock is currently used as system clock.
3.2.3 CLOCK-OUT CAPABITITY
The MCU clock output (CLKOUT) capability allows the clock to be output onto the external CLKOUT pin. The
configuration registers of the corresponding GPIO port must be programmed in alternate function mode.
One of 3 clock signals can be selected as clock output:
1. HCLK
2. IHRC
3. ILRC
The selection is controlled by the CLKOUTSEL bits in SYS1_AHBCLKEN register.
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