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SONIX SN32F264 - Electrical Characteristics and Ratings; Absolute Maximum Ratings

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SN32F260 Series
32-Bit Cortex-M0 Micro-Controller
SONiX TECHNOLOGY CO., LTD Page 129 Version 1.5
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ELECTRICAL CHARACTERISTIC
14.1 ABSOLUTE MAXIMUM RATING
Supply voltage (Vdd)…………………………………………………………………………………………………………………….……………… - 0.3V ~ 5.5V
Input in voltage (Vin)…………………………………………………………………………………………………………………….… Vss – 0.2V ~ Vdd + 0.2V
Operating ambient temperature (Topr)………………………………………...……………………………..……...…………. ………………-40C ~ + 85C
Storage ambient temperature (Tstor) ………………………………………………………………….………………………………………… –40C ~ + 125C
14.2 ELECTRICAL CHARACTERISTIC
All of voltages refer to Vss, Typical Vdd = 5.0V, Fosc = 12MHz, ambient temperature is 25 unless otherwise note.
PARAMETER
SYM.
DESCRIPTION
MIN.
TYP.
MAX.
UNIT
Operating Voltage
Vdd1
Supply voltage for core and external rail
2.5
5.0
5.5
V
Vdd2
USB mode
3.1
5.0
5.25
V
VDD rise rate
V
POR
VDD rise rate to ensure internal power-on reset
0.05
-
-
V/ms
Power Consumption
Supply Current
Idd1
Normal mode
System clock = 48MHz
[1][2[3]
-
12
-
mA
Idd2
Sleep Mode
System clock = 32KHz
[1][3][4]
-
160
230
uA
Idd3
Deep-sleep Mode
Vdd=5V
[1][5]
-
5
16
uA
Port Pins, RESET pin
High-level input voltage
V
IH
0.7Vdd
-
Vdd
V
Low-level input voltage
V
IL
Vss
-
0.3Vdd
V
Input voltage
V
i
0
-
Vdd
V
Output voltage
V
o
0
-
Vdd
V
I/O port pull-up resistor
R
PU
Vin = Vss , Vdd = 5.0V
30
50
70
I/O port pull-down resistor
(SWD pull-down pin)
R
PD
Vin = 5.0V
30
50
70
I/O High-level output source
current
I
OH
V
OP
= Vdd 0.5V;
6
10
-
mA
I/O Low-level output sink current
I
OL
V
OP
= Vss + 0.5V
12
20
-
mA
FLASH
Endurance time
T
EN
Erase + Program
10K
*100K
-
Cycle
Page erase time
T
ME
All User ROM memory.
-
5
-
ms
Page Programming time
T
PG
1 -Page (64 bytes).
-
5
-
ms
MISC
Low Voltage Detector
LVD
Interrupt/Reset
LVD24
2.2
2.4
2.6
V
LVD33
3.1
3.3
3.5
V
3.3V Regulator Output voltage
Vreg33
VCC 3.60V, IVREG33 >= 60 mA
3.03
-
3.27
V
IHRC Freq.
F
IHRC
T=-25, Vdd=5V, USB function ON
11.97
12
12.03
MHz
* Parameters with star mark are non-verified design reference.
[1] IDD measurements were performed with all pins configured as GPIO outputs driven LOW and pull-up resistors disabled and VDD=5V.
[2] IHRC and ILRC are enabled.
[3] LVD and GPIO peripherals are enabled.
[4] IHRC is disabled, ILRC is enabled.
[5] All oscillators and analog blocks are turned off.

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