Tibbo DS1100 - Size 3 Tibbo Project PCB (TPP3), Gen 2

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387 Programmable Hardware Manual (PHM)

When the jumpers are in the 1-2 position, four power lines from the RJ45 jack are

connected to four I/O lines of (S11). Under this arrangement you can install an M1

PoE device into the (S11), or M2 PoE device into the (S9)-(S11).

When the jumpers are in the 2-3 position, the RJ45 jack is disconnected from the

socket (S11). The socket (S11) is instead connected to (S12) in a "standard tile

way".

7.3.1.2

Size 3 Tibbo Project PCB (TPP3), Gen 2

Gen. 2 performance highlights

The TPP2(G2) is a high-performance upgrade to the original TPP2 board. Here is a

list of important improvements:

32-bit architecture (vs. 16-bit architecture of the TPP2)

Five to 80 times better performance, depending on the calculations and variable

types

Seven times faster GPIO manipulation

Three times larger available user SRAM (66KB vs. 22KB)

Two times larger flash memory (1MB for TiOS/code + 1MB for the file system vs.

1MB total for TiOS, code, and file system)

2.2 times lower power consumption (100mA vs. 220mA)

Four-channel ADC

The ability to update TiOS firmware and compiled Tibbo BASIC/C app over-the-air

(this requires the WA2000 and an iOS or Android device)

Introduction

Other manuals for Tibbo DS1100