Xilinx Virtex-5 RocketIO GTP User Manual

Virtex-5 RocketIO GTP Transceiver User Guide www.xilinx.com 295
UG196 (v1.3) May 25, 2007
DRP Address by Attribute
R
TRANS_TIME_TO_P2_0
3b<13> 3b<14> 3b<15>
3c<0> 3c<1> 3c<2> 3c<3> 3c<4> 3c<5> 3c<6> 3c<7> 3c<8> 3c<9>
3c<10>
3c<11>
3c<12>
TRANS_TIME_TO_P2_1
14<2> 14<1> 14<0>
13<15> 13<14> 13<13> 13<12>
13<11>
13<10>
13<9> 13<8> 13<7> 13<6> 13<5> 13<4> 13<3>
TX_BUFFER_USE_0
3b<12>
TX_BUFFER_USE_1
14<3>
TX_DIFF_BOOST_0
4a<13>
TX_DIFF_BOOST_1
5<2>
TX_SYNC_FILTERB
24<13>
TX_XCLK_SEL_0
3a<8>
TX_XCLK_SEL_1
15<7>
Ta ble D - 2 : DRP Address by Attribute (Continued)
Attribute
Bit
0 1 2 3 4 5 6 7 8 9
10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31

Xilinx Virtex-5 RocketIO GTP Specifications

General

Brand	Xilinx
Model	Virtex-5 RocketIO GTP
Category	Transceiver
Language	English