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Xilinx Virtex-5 RocketIO GTP

Xilinx Virtex-5 RocketIO GTP
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210 www.xilinx.com Virtex-5 RocketIO GTP Transceiver User Guide
UG196 (v1.3) May 25, 2007
Chapter 10: GTP-to-Board Interface
R
Switching between Two Different Reference Clocks
There are two ways to implement a design that needs to operate at two different clock rates
(for example, in a HD-SDI video application):
1. Use the DRP to switch between two different clocks that are sourced from two
different GTP_DUAL reference clock pins to the dedicated clock routing of the
GTP_DUAL column.
2. Use an external clock multiplexer with one or multiple outputs.
The first solution is limited to up to four GTP_DUAL primitives and therefore to a
maximum of eight GTP transceivers. In this configuration, one clock is sourced from the
top and one clock is sourced from the bottom of four GTP_DUAL primitives, which are
direct neighbors to each other.
The second solution can be used for up to seven GTP_DUAL primitives and therefore to a
maximum of 14 GTP transceivers, if an external multiplexer with one output is used. In
this configuration, the GTP_DUAL primitive that sources the clock is located in the middle
of seven GTP_DUAL primitives that are direct neighbors to each other. If a clock
multiplexer with n outputs is used, this solution can be expanded up to n-times
7 GTP_DUAL primitives and therefore up to n-times 14 GTP transceivers.
AC Coupling
AC coupling of the oscillator reference clock output to the GTP_DUAL reference clock
inputs serves multiple purposes:
Blocking a DC current between the oscillator and the GTP_DUAL dedicated clock
input pins (which reduces the power consumption of both parts as well)
Common mode voltage independence
The AC coupling capacitor forms a high-pass filter with the on-chip termination that
attenuates a wander
(1)
of the reference clock
To minimize noise and power consumption, external AC coupling capacitors between the
sourcing oscillator and the GTP_DUAL dedicated clock reference clock input pins are
required.
Unused Reference Clock Inputs of GTP_DUAL Tiles for Clock Forwarding
It is recommended to connect the unused differential input pin clock pair to ground or left
floating (both MGTREFCLKP and MGTREFCLKN).
1. A wander is low-frequency jitter.

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