Xilinx Virtex-5 RocketIO GTP User Manual

296 www.xilinx.com Virtex-5 RocketIO GTP Transceiver User Guide
UG196 (v1.3) May 25, 2007
Appendix D: DRP Address Map of the GTP_DUAL Tile
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DRP Address by Bit Location
This section lists the attributes according to DRP address and bit location:
• Table D-3, DRP Addresses 00 through 07
• Table D-4, DRP Addresses 08 through 0F
• Table D-5, DRP Addresses 10 through 17
• Table D-6, DRP Addresses 18 through 1F
• Table D-7, DRP Addresses 20 through 27
• Table D-8, DRP Addresses 28 through 2F
• Table D-9, DRP Addresses 30 through 37
• Table D-10, DRP Addresses 38 through 3F
• Table D-11, DRP Addresses 40 through 47
• Table D-12, DRP Addresses 48 through 4F

Xilinx Virtex-5 RocketIO GTP Specifications

General

Brand	Xilinx
Model	Virtex-5 RocketIO GTP
Category	Transceiver
Language	English