Xilinx Virtex-5 RocketIO GTP User Manual

Virtex-5 RocketIO GTP Transceiver User Guide www.xilinx.com 37
UG196 (v1.3) May 25, 2007
Ports and Attributes
R
SATA_MIN_WAKE_0
SATA_MIN_WAKE_1
Used to set the minimum time allowed for a
COMWAKE idle for the SATA detector in
terms of squelch clock cycles.
RX OOB/Beacon Signaling
(page 132)
SIM_GTPRESET_SPEEDUP
Shortens the time it takes to finish the
GTPRESET sequence and PLL lock during
simulation.
Simulation (page 42)
SIM_PLL_PERDIV2
Specifies the length of one symbol in
picoseconds for simulation.
Simulation (page 42)
SIM_RECEIVER_DETECT_PASS0
SIM_RECEIVER_DETECT_PASS1
Controls the receiver detect function. Simulation (page 42)
TERMINATION_CTRL[4:0]
Controls internal termination calibration
circuit.
Analog Design Guidelines,
(page 202)
TERMINATION_OVRD
Selects whether the external 50Ω precision
resistor, connected to the MGTRREF pin, or
an override value is used, as defined by
TERMINATION_CTRL.
Analog Design Guidelines,
(page 202)
TRANS_TIME_FROM_P2_0
TRANS_TIME_FROM_P2_1
Transition time from the P2 powerdown
state in internal 25 MHz clock cycles. The
exact time depends on the CLKIN rate and
the setting of CLK25_DIVIDER.
Power Control (page 82)
TRANS_TIME_NON_P2_0
TRANS_TIME_NON_P2_1
Transition time to or from any powerdown
state except P2 in internal 25 MHz clock
cycles. The exact time depends on the
CLKIN rate and the setting of
CLK25_DIVIDER.
Power Control (page 82)
TRANS_TIME_TO_P2_0
TRANS_TIME_TO_P2_1
Transition time to the P2 powerdown state
in internal 25 MHz clock cycles. The exact
time depends on the CLKIN rate and the
setting of CLK25_DIVIDER.
Power Control (page 82)
TX_BUFFER_USE_0
TX_BUFFER_USE_1
Indicates whether the TX buffer is used.
TX Buffering, Phase Alignment,
and Buffer Bypass (page 105)
TX_DIFF_BOOST_0
TX_DIFF_BOOST_1
Changes the strength of the TX driver and
pre-emphasis buffers. When set to TRUE,
the pre-emphasis percentage is boosted or
increased. See Table 6-18, page 114 for
nominal differential swing and pre-
emphasis values.
Overall differential swing is reduced when
TX_DIFF_BOOST is TRUE.
Configurable TX Driver
(page 113)
TX_SYNC_FILTERB
This parameter must be left at its default
value of 1.
Table 1-4: GTP_DUAL Attribute Summary (Continued)
Attribute Description Section (Page)

Xilinx Virtex-5 RocketIO GTP Specifications

General

Brand	Xilinx
Model	Virtex-5 RocketIO GTP
Category	Transceiver
Language	English