Architect i2000SR - Page 39

Service Manual i2000SR interface module
625798100.APS.5.doc Page 39 of 212
The following is a description of the carrier movement until the
exercise is stopped:
1. Carriers are in their initial queues.
2. Lane 3 – Priority (G8) releases a carrier to Lane 4 (G6)
3. Lane 3 – Routine (G7b) releases a carrier to Lane 2 (G5)
4. Lane 3 – Priority (G8) releases a carrier to Lane 4 (G6)
5. Lane 3 – Routine (G7b) releases a carrier to Lane 2 (G5)
6. Lane 2 (G5) alternately routes a carrier between Lane 1
and Lane 4. This process continues until the exercise is stopped.
• Lane 1 – As carriers arrive on Lane 1 Barcode gate (G2a)
they are released to STAT Pipettor (G3) and then to
Routine Pipettor (G4).
• Lane 2 – As carriers arrive at Lane 2 (G5), they are routed
to Lane 4 (G6).
• Lane 4 – As carriers are routed to Lane 4 (G6) they are
released to Routine Input (G7b)
7. Lane 3 – Routine (G7b) releases 16 carriers to Lane 2 (G5)
8. Lane 3 – Routine (G7b) releases 1 carrier (#18) to Priority
(G8)
9. Lane 3 – Routine (G7b) releases 1 carrier to Lane 2 (G5)
10. Lane 3 – Routine (G7b) releases 1 carrier (#20) to Priority
(G8)
11. Lane 3 – Routine (G7b) releases 1 carrier to Lane 2 (G5)