Casio QT-6000 - Page 65

— 63 —
8-8-2. Block Diagram
INTP2/NMI
INTP0, INTP1,
INTP3-INTP6
PROGRAMMABLE
INTERRUPT
CONTROLLER
REAL-TIME
OUTPUT PORT
TIMER/COUNTER7
TIMER/COUNTER6
TIMER/COUNTER5
TIMER/COUNTER2
TIMER/COUNTER1
(8 BITS)
(8 BITS)
(8 BITS)
(8 BITS)
(8 BITS)
(8 BITS)
TIMER/COUNTER
(16 BITS)
WATCH TIMER
TIMER/COUNTER8
WATCHDOG TIMER
TI00
TI01
TO0
TI1
TO1
TI2
TO2
TI5/TO5
TI6/TO6
TI7/TO7
TI8/TO8
RTP0-RTP7
CLOCK OUTPUT
CONTROL
A/D
CONVERTER
AV
DD
AV SS
P03
NMI/INTP2
PCL
BUZ
AV
REF0
ANI0-ANI7
D/A
CONVERTER
ANO0
AV
SS
AV REF1
ANO1
78K/IV
CPU CORE
ROM
RAM
BAUD-RATE
GENERATOR
RxD1/SI1
TxD1/SO1
ASCK1/SCK1
RxD2/SI2
TxD2/SO2
ASCK2/SCK2
SI0
SO0
SCK0
BUS I/F
UART/IOE1
RD
ASTB
WR
WAIT
A0-A7
AD0-AD7
A8-A15
A16-A19
PORT1
P10-P17
PORT0
P00-P06
PORT2
P20-P27
PORT3
P30-P37
PORT4
P40-P47
PORT5
P50-P57
PORT6
P60-P67
PORT7
P70-P72
PORT8
P80-P87
PORT9
P90-P95
PORT10
P100-P103
PORT12
P120-P127
PORT13
P130,P131
BUZZER OUTPUT
SYSTEM CONTROL
RESET
XT2
X1
XT1
X2
V
SS
V DD
CLOCKED
SERIAL
INTERFACE
BAUD-RATE
GENERATOR
UART/IOE2