Maintenance 5-173
Installing and Configuring Processor Modules
Bits 20 through 23 (the four pairs of pins on the far left of the 50-pin header) are not used in normal
operation; however, they can be used to invoke the cache disable, processor halt, external reset, and
slave mode functions. (See Figure 5-6.)
Figure 5-6 Optional Configuration Register Settings
Note Configuration register setting changes take effect when the system restarts.
Flash Memory Write Protection
The Flash memory write-protection option protects the contents of Flash memory against accidental
erasure or reprogramming. The factory default, with a jumper installed on J2, is to allow
programming (writing) to Flash memory. To protect the contents, remove the jumper from J2. You
can later replace the jumper to enable Flash programming. The location of J2 is shown in Figure 5-4.
Software Configuration Register
This section describes the software (virtual) configuration register that is used with the RP in a
system running Cisco IOS Release 10.0 or later in ROM.
Following is the information included in this section:
• Software configuration register settings.
• Explanation of boot field.
• Changing configuration register settings.
• Software configuration register bit meanings
• Default boot filenames.
• Software configuration register settings for broadcast address destination.
• System console terminal baud-rate settings.
• Enabling booting from onboard Flash.
• Copying to onboard Flash.
19
20
21
22
23
24
Bit 24 Not used (leave cleared)
Bit 23 Slave mode
Bit 22 External reset
Bit 21 Processor halt
Bit 20 Cache disable
Bit 19 Burst mode disable
H1374a
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